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Message-ID: <20260108175100.3535306-1-andriy.shevchenko@linux.intel.com>
Date: Thu, 8 Jan 2026 18:49:40 +0100
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
Mark Brown <broonie@...nel.org>,
Prajna Rajendra Kumar <prajna.rajendrakumar@...rochip.com>,
linux-spi@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: Conor Dooley <conor.dooley@...rochip.com>
Subject: [PATCH v1 1/1] spi: microchip-core: use XOR instead of ANDNOT to fix the logic
Use XOR instead of ANDNOT to fix the logic. The current approach with
(foo & BAR & ~baz) is harder to process, and it proved to be wrong,
than more usual pattern for the comparing misconfiguration using
((foo ^ baz) & BAR) which can be read as "find all different bits
between foo and baz that are related to BAR (mask)". Besides that
it makes the binary code shorter.
Function old new delta
mchp_corespi_setup 103 99 -4
Fixes: 059f545832be ("spi: add support for microchip "soft" spi controller")
Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
Tested-by: Prajna Rajendra Kumar <prajna.rajendrakumar@...rochip.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
---
Updated the commit message, added Fixes and Test-by tags, and sent
as standalone patch.
drivers/spi/spi-microchip-core-spi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spi/spi-microchip-core-spi.c b/drivers/spi/spi-microchip-core-spi.c
index 89e40fc45d73..c8ebb58e0369 100644
--- a/drivers/spi/spi-microchip-core-spi.c
+++ b/drivers/spi/spi-microchip-core-spi.c
@@ -161,7 +161,7 @@ static int mchp_corespi_setup(struct spi_device *spi)
return -EOPNOTSUPP;
}
- if (spi->mode & SPI_MODE_X_MASK & ~spi->controller->mode_bits) {
+ if ((spi->mode ^ spi->controller->mode_bits) & SPI_MODE_X_MASK) {
dev_err(&spi->dev, "incompatible CPOL/CPHA, must match controller's Motorola mode\n");
return -EINVAL;
}
--
2.50.1
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