linux-kernel - Re: [PATCH v4 5/5] thermal: renesas: rzg3e: add support for RZ/T2H and RZ/N2H

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Message-ID: <CAMuHMdUs33Y25xV2ML2hMfi=9oZF_qunf+iBytWoCVK6wB9eXw@mail.gmail.com>
Date: Thu, 8 Jan 2026 19:16:11 +0100
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Cosmin-Gabriel Tanislav <cosmin-gabriel.tanislav.xa@...esas.com>
Cc: John Madieu <john.madieu.xa@...renesas.com>, "Rafael J . Wysocki" <rafael@...nel.org>, 
	Daniel Lezcano <daniel.lezcano@...aro.org>, Zhang Rui <rui.zhang@...el.com>, 
	Lukasz Luba <lukasz.luba@....com>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Philipp Zabel <p.zabel@...gutronix.de>, "magnus.damm" <magnus.damm@...il.com>, 
	"linux-pm@...r.kernel.org" <linux-pm@...r.kernel.org>, 
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>, 
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, 
	"linux-renesas-soc@...r.kernel.org" <linux-renesas-soc@...r.kernel.org>
Subject: Re: [PATCH v4 5/5] thermal: renesas: rzg3e: add support for RZ/T2H
 and RZ/N2H

Hi Cosmin,

On Thu, 8 Jan 2026 at 19:08, Cosmin-Gabriel Tanislav
<cosmin-gabriel.tanislav.xa@...esas.com> wrote:
> > From: Geert Uytterhoeven <geert@...ux-m68k.org>
> > On Thu, 8 Jan 2026 at 17:55, Cosmin Tanislav
> > <cosmin-gabriel.tanislav.xa@...esas.com> wrote:
> > > The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs expose the
> > > temperature calibration via SMC SIP and do not have a reset for the
> > > TSU peripheral, and use different minimum and maximum temperature values
> > > compared to the already supported RZ/G3E.
> > >
> > > Although the calibration data is stored in an OTP memory, the OTP itself
> > > is not memory-mapped, access to it is done through an OTP controller.
> > >
> > > The OTP controller is only accessible from the secure world,
> > > but the temperature calibration data stored in the OTP is exposed via
> > > SMC.
> > >
> > > Add support for retrieving the calibration data using arm_smcc_smc().
> > >
> > > Add a compatible for RZ/T2H, RZ/N2H can use it as a fallback.
> > >
> > > Reviewed-by: John Madieu <john.madieu.xa@...renesas.com>
> > > Tested-by: John Madieu <john.madieu.xa@...renesas.com>
> > > Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@...esas.com>

> > > --- a/drivers/thermal/renesas/rzg3e_thermal.c
> > > +++ b/drivers/thermal/renesas/rzg3e_thermal.c
> >
> > > @@ -362,6 +366,21 @@ static int rzg3e_thermal_get_syscon_trim(struct rzg3e_thermal_priv *priv)
> > >         return 0;
> > >  }
> > >
> > > +static int rzg3e_thermal_get_smc_trim(struct rzg3e_thermal_priv *priv)
> > > +{
> > > +       struct arm_smccc_res local_res;
> >
> > Missing #include <linux/arm-smccc.h> (on e.g. arm and riscv).
>
> Ack.
>
> > > +
> > > +       arm_smccc_smc(RZ_SIP_SVC_GET_SYSTSU, OTP_TSU_REG_ADR_TEMPLO,
> > > +                     0, 0, 0, 0, 0, 0, &local_res);
> >
> > Can this crash? E.g. if this SMC call is not supported by the firmware?
> >
>
> Default TF-A firmware for RZ/N2H was missing this exact SMC call as it
> was on an older version. All it did was return SMC_UNK, which is -1.
> I checked the code and SMC_UNK is returned in all failure cases.
> So, no crash. And -1 is caught by the 0xFFF check.

OK.

> Oh, maybe I should change the 0xFFF check (the one I just moved into
> rzg3e_thermal_probe()) to use the TSU_CODE_MAX macro too? I just
> noticed it.

Yeah, sounds good.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds