linux-kernel - Re: [PATCH] media: verisilicon: AV1: Set IDR flag for intra

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Message-ID: <dead1a4383691de7458e629de8808d2518e7415a.camel@collabora.com>
Date: Thu, 08 Jan 2026 14:43:17 -0500
From: Nicolas Dufresne <nicolas.dufresne@...labora.com>
To: Benjamin Gaignard <benjamin.gaignard@...labora.com>, 
	p.zabel@...gutronix.de, mchehab@...nel.org, heiko@...ech.de
Cc: linux-media@...r.kernel.org, linux-rockchip@...ts.infradead.org, 
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org, 
	kernel@...labora.com, Jianfeng Liu <liujianfeng1994@...il.com>
Subject: Re: [PATCH] media: verisilicon: AV1: Set IDR flag for intra_only
 frame type

Le jeudi 08 janvier 2026 à 14:29 +0100, Benjamin Gaignard a écrit :
> Intra_only frame could be considered as a key frame so Instantaneous
> Decoding Refresh (IDR) flag must be set of the both case and not only
> for key frames.
> 
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@...labora.com>
> Reported-by: Jianfeng Liu <liujianfeng1994@...il.com>
> Fixes: 727a400686a2c ("media: verisilicon: Add Rockchip AV1 decoder")

Reviewed-by: Nicolas Dufresne <nicolas.dufresne@...labora.com>

> ---
>  drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c b/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
> index 1605cfd55d36..3a8123bbe144 100644
> --- a/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
> +++ b/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
> @@ -2047,7 +2047,7 @@ static void rockchip_vpu981_av1_dec_set_parameters(struct hantro_ctx *ctx)
>  			 !!(ctrls->frame->quantization.flags
>  			    & V4L2_AV1_QUANTIZATION_FLAG_DELTA_Q_PRESENT));
>  
> -	hantro_reg_write(vpu, &av1_idr_pic_e, !ctrls->frame->frame_type);
> +	hantro_reg_write(vpu, &av1_idr_pic_e, IS_INTRA(ctrls->frame->frame_type));
>  	hantro_reg_write(vpu, &av1_quant_base_qindex, ctrls->frame->quantization.base_q_idx);
>  	hantro_reg_write(vpu, &av1_bit_depth_y_minus8, ctx->bit_depth - 8);
>  	hantro_reg_write(vpu, &av1_bit_depth_c_minus8, ctx->bit_depth - 8);

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