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Message-ID: <6749502.DvuYhMxLoT@antlia>
Date: Fri, 09 Jan 2026 21:08:32 +0530
From: Bhushan Shah <bhushan.shah@...hinesoul.in>
To: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
cros-qcom-dts-watchers@...omium.org,
Bharadwaj Raju <bharadwaj.raju@...hinesoul.in>,
Alexandre Ferrieux <alexandre.ferrieux@...nge.com>,
Luca Weiss <luca.weiss@...rphone.com>
Cc: ~postmarketos/upstreaming@...ts.sr.ht, phone-devel@...r.kernel.org,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject:
Re: [PATCH] arm64: dts: qcom: kodiak: Add missing clock votes for lpass_tlmm
On Friday, 9 January 2026 20:44:34 IST Luca Weiss wrote:
> Without the correct clock votes set, we may be hitting a synchronous
> external abort error when touching the lpi registers.
>
> Internal error: synchronous external abort: 0000000096000010 [#1] SMP
> <...>
> Call trace:
> lpi_gpio_read.isra.0+0x2c/0x58 (P)
> pinmux_enable_setting+0x218/0x300
> pinctrl_commit_state+0xb0/0x280
> pinctrl_select_state+0x28/0x48
> pinctrl_bind_pins+0x1f4/0x2a0
> really_probe+0x64/0x3a8
>
> Add the clocks to fix that.
>
> Platforms with this SoC using AudioReach won't be impacted due to
> qcs6490-audioreach.dtsi already setting clocks & clock-names for
> q6prmcc. The sc7280-chrome-common.dtsi has also been adjusted to keep
> the behavior the same as they also do not use Elite with q6afecc.
>
> Signed-off-by: Luca Weiss <luca.weiss@...rphone.com>
Tested-by: Bhushan Shah <bhushan.shah@...hinesoul.in> # On fairphone-fp5
> ---
> This issue is somewhat of a race condition, with some kernel configs it
> cannot (easily) be triggered, with others relatively reliably but it
> seems also to be somewhat related to cold boot.
>
> Also I can't pinpoint a good Fixes tag, lpass_tlmm was introduced before
> q6afecc got added for this SoC, and that worked fine for those boards it
> seems. It's just needed on boards with Elite audio architecture.
> ---
> arch/arm64/boot/dts/qcom/kodiak.dtsi | 5 +++++
> arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi | 5 +++++
> 2 files changed, 10 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi
> b/arch/arm64/boot/dts/qcom/kodiak.dtsi index 076069f14495..f478c5e1d2d5
> 100644
> --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi
> +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi
> @@ -2994,6 +2994,11 @@ lpass_tlmm: pinctrl@...0000 {
> compatible = "qcom,sc7280-lpass-lpi-
pinctrl";
> reg = <0 0x033c0000 0x0 0x20000>,
> <0 0x03550000 0x0 0x10000>;
> +
> + clocks = <&q6afecc LPASS_HW_MACRO_VOTE
LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> + <&q6afecc LPASS_HW_DCODEC_VOTE
LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
> + clock-names = "core", "audio";
> +
> gpio-controller;
> #gpio-cells = <2>;
> gpio-ranges = <&lpass_tlmm 0 0 15>;
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi
> b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi index
> 84c6d662b54f..617a39d32488 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi
> @@ -67,6 +67,11 @@ &lpass_hm {
> status = "okay";
> };
>
> +&lpass_tlmm {
> + /delete-property/ clocks;
> + /delete-property/ clock-names;
> +};
> +
> &lpasscc {
> status = "okay";
> };
>
> ---
> base-commit: ef1c7b875741bef0ff37ae8ab8a9aaf407dc141c
> change-id: 20260109-kodiak-lpass-tlmm-clocks-7da465d40eaf
>
> Best regards,
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