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Message-ID: <eb8b98b7-1c56-415b-b0d7-a87f7a33701d@intel.com>
Date: Fri, 9 Jan 2026 08:53:06 -0700
From: Dave Jiang <dave.jiang@...el.com>
To: Li Ming <ming.li@...omail.com>, dave@...olabs.net,
jonathan.cameron@...wei.com, alison.schofield@...el.com,
vishal.l.verma@...el.com, ira.weiny@...el.com, dan.j.williams@...el.com,
shiju.jose@...wei.com
Cc: linux-cxl@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/1] cxl/acpi: Remove cxl_acpi_set_cache_size()
On 1/9/26 8:40 AM, Li Ming wrote:
> cxl_acpi_set_cache_size() returns an error only when the size of the
> cache range is not matched with the CXL address range. Almost all
> implementation of setting cache size is in cxl_acpi_set_cache_size(),
> cxl_setup_extended_linear_size() does nothing except printing a warning
> in above error case, but cxl_acpi_set_cache_size() also prints a warning
> at the same time. So can consolidates these two functions into one, keep
> the function name as cxl_setup_extended_linear_size().
>
> Signed-off-by: Li Ming <ming.li@...omail.com>
Thanks for the cleanup. Should've happened when I moved it from core to acpi.
Reviewed-by: Dave Jiang <dave.jiang@...el.com>
> ---
> drivers/cxl/acpi.c | 29 +++++------------------------
> 1 file changed, 5 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c
> index 77ac940e3013..e65dfae42bde 100644
> --- a/drivers/cxl/acpi.c
> +++ b/drivers/cxl/acpi.c
> @@ -357,7 +357,7 @@ static int add_or_reset_cxl_resource(struct resource *parent, struct resource *r
> return rc;
> }
>
> -static int cxl_acpi_set_cache_size(struct cxl_root_decoder *cxlrd)
> +static void cxl_setup_extended_linear_cache(struct cxl_root_decoder *cxlrd)
> {
> struct cxl_decoder *cxld = &cxlrd->cxlsd.cxld;
> struct range *hpa = &cxld->hpa_range;
> @@ -367,12 +367,14 @@ static int cxl_acpi_set_cache_size(struct cxl_root_decoder *cxlrd)
> struct resource res;
> int nid, rc;
>
> + /* Explicitly initialize cache size to 0 at the beginning */
> + cxlrd->cache_size = 0;
> res = DEFINE_RES_MEM(start, size);
> nid = phys_to_target_node(start);
>
> rc = hmat_get_extended_linear_cache_size(&res, nid, &cache_size);
> if (rc)
> - return 0;
> + return;
>
> /*
> * The cache range is expected to be within the CFMWS.
> @@ -384,31 +386,10 @@ static int cxl_acpi_set_cache_size(struct cxl_root_decoder *cxlrd)
> dev_warn(&cxld->dev,
> "Extended Linear Cache size %pa != CXL size %pa. No Support!",
> &cache_size, &size);
> - return -ENXIO;
> + return;
> }
>
> cxlrd->cache_size = cache_size;
> -
> - return 0;
> -}
> -
> -static void cxl_setup_extended_linear_cache(struct cxl_root_decoder *cxlrd)
> -{
> - int rc;
> -
> - rc = cxl_acpi_set_cache_size(cxlrd);
> - if (rc) {
> - /*
> - * Failing to retrieve extended linear cache region resize does not
> - * prevent the region from functioning. Only causes cxl list showing
> - * incorrect region size.
> - */
> - dev_warn(cxlrd->cxlsd.cxld.dev.parent,
> - "Extended linear cache retrieval failed rc:%d\n", rc);
> -
> - /* Ignoring return code */
> - cxlrd->cache_size = 0;
> - }
> }
>
> DEFINE_FREE(put_cxlrd, struct cxl_root_decoder *,
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