linux-kernel - Re: [PATCH v3 4/6] iio: frequency: adf41513: features on frequency change

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <aWFR2wTSWLydGN5O@smile.fi.intel.com>
Date: Fri, 9 Jan 2026 21:07:07 +0200
From: Andy Shevchenko <andriy.shevchenko@...el.com>
To: rodrigo.alencar@...log.com
Cc: linux-kernel@...r.kernel.org, linux-iio@...r.kernel.org,
	devicetree@...r.kernel.org, linux-doc@...r.kernel.org,
	Jonathan Cameron <jic23@...nel.org>,
	David Lechner <dlechner@...libre.com>,
	Andy Shevchenko <andy@...nel.org>,
	Lars-Peter Clausen <lars@...afoo.de>,
	Michael Hennerich <Michael.Hennerich@...log.com>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Jonathan Corbet <corbet@....net>
Subject: Re: [PATCH v3 4/6] iio: frequency: adf41513: features on frequency
 change

On Thu, Jan 08, 2026 at 12:14:53PM +0000, Rodrigo Alencar via B4 Relay wrote:

> Set Bleed current when PFD frequency changes (bleed enabled when in
> fractional mode). Set lock detector window size, handling bias and
> precision. Add phase resync support, setting clock dividers when
> PFD frequency changes.

...

> +static const u16 adf41513_ld_window_p1ns[] = {
> +	9, 12, 16, 17, 21, 28, 29, 35,			/* 0 - 7 */
> +	43, 47, 49, 52, 70, 79, 115			/* 8 - 14 */

Leave trailing comma.

> +};
> +
> +static const u8 adf41513_ldp_bias[] = {
> +	0xC, 0xD, 0xE, 0x8, 0x9, 0x4, 0xA, 0x5,		/* 0 - 7 */
> +	0x0, 0x6, 0xB, 0x1, 0x2, 0x7, 0x3		/* 8 - 14 */

Ditto.

> +};
> +
>  static const char * const adf41513_power_supplies[] = {
>  	"avdd1", "avdd2", "avdd3", "avdd4", "avdd5", "vp"

Ditto.

>  };

...

> +	bleed_value = div64_u64(st->settings.pfd_frequency_uhz * bleed_value,
> +				1600ULL * HZ_PER_MHZ * MICROHZ_PER_HZ);

> +	u16 ld_window_p1ns = div64_u64(10ULL * NANO * MICROHZ_PER_HZ,
> +				       st->settings.pfd_frequency_uhz << 1);

These multiplications (here and elsewhere) are (very) confusing.

I believe you want to have a frequency in Hz in µHz resolution. The second one
can be close to this if used GIGA instead of NANO. But I think the better way
to have something like the first one but with MICRO instead of MICROHZ_PER_HZ.

Please, put an order in these.

...

> +	/* assuming both clock dividers hold similar values */
> +	total_div = mul_u64_u64_div_u64(st->settings.pfd_frequency_uhz,
> +					st->data.phase_resync_period_ns,
> +					1ULL * MICRO * NANO);

This sounds good as we multiply Hz by ns.

...

> +	st->data.phase_resync_period_ns = 0;

Do we even need this?

> +	ret = device_property_read_u32(dev, "adi,phase-resync-period-ns", &tmp);
> +	if (!ret)
> +		st->data.phase_resync_period_ns = tmp;

Is the _period_ns of type u32? Then simply

	device_property_read_u32(dev, "adi,phase-resync-period-ns", &st->data.phase_resync_period_ns);

-- 
With Best Regards,
Andy Shevchenko