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Message-ID: <65f60d6f-d6f9-4c36-a344-ffc713633dfd@gmail.com>
Date: Fri, 9 Jan 2026 08:27:40 +0100
From: Heiner Kallweit <hkallweit1@...il.com>
To: Daniel Golle <daniel@...rotopia.org>, Andrew Lunn <andrew@...n.ch>,
 Russell King <linux@...linux.org.uk>, "David S. Miller"
 <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>,
 Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
 Vladimir Oltean <vladimir.oltean@....com>,
 Michael Klein <michael@...sekall.de>, Aleksander Jan Bajkowski
 <olek2@...pl>, netdev@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH net-next 2/5] net: phy: realtek: simplify C22 reg access
 via MDIO_MMD_VEND2

On 1/9/2026 4:03 AM, Daniel Golle wrote:
> RealTek 2.5GE PHYs have all standard Clause-22 registers mapped also
> inside MDIO_MMD_VEND2 at offset 0xa400. This is used mainly in case the
> PHY is inside a copper SFP module which uses the RollBall MDIO-over-I2C
> method which *only* supports Clause-45. In order to support such
> modules, the PHY driver has previously been split into a C22-only and
> C45-only instances, creating quite a bit of redundancy and confusion.
> 
To complement: RTL812x MAC/PHY chips allow access to MDIO_MMD_VEND2 of the
integrated PHY only. There is no native C22 MDIO access.

> In preparation of reunifying the two driver instances, add support for
> translating MDIO_MMD_VEND2 registers 0xa400 to 0xa438 back to standard
> Clause-22 access in case the PHY is accessed on a Clause-22 bus.
> 
> Signed-off-by: Daniel Golle <daniel@...rotopia.org>
> ---
>  drivers/net/phy/realtek/realtek_main.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/drivers/net/phy/realtek/realtek_main.c b/drivers/net/phy/realtek/realtek_main.c
> index 7302b25b8908b..886694ff995f6 100644
> --- a/drivers/net/phy/realtek/realtek_main.c
> +++ b/drivers/net/phy/realtek/realtek_main.c
> @@ -143,6 +143,7 @@
>  
>  #define RTL822X_VND2_TO_PAGE(reg)		((reg) >> 4)
>  #define RTL822X_VND2_TO_PAGE_REG(reg)		(16 + (((reg) & GENMASK(3, 0)) >> 1))
> +#define RTL822X_VND2_TO_C22_REG(reg)		(((reg) - 0xa400) / 2)
>  #define RTL822X_VND2_C22_REG(reg)		(0xa400 + 2 * (reg))
>  
>  #define RTL8221B_VND2_INER			0xa4d2
> @@ -1264,6 +1265,11 @@ static int rtl822xb_read_mmd(struct phy_device *phydev, int devnum, u16 reg)
>  		return mmd_phy_read(phydev->mdio.bus, phydev->mdio.addr,
>  				    phydev->is_c45, devnum, reg);
>  
> +	/* Simplify access to C22-registers addressed inside MDIO_MMD_VEND2 */
> +	if (reg >= RTL822X_VND2_C22_REG(0) &&
> +	    reg <= RTL822X_VND2_C22_REG(30))
> +		return __phy_read(phydev, RTL822X_VND2_TO_C22_REG(reg));
> +
>  	/* Use paged access for MDIO_MMD_VEND2 over Clause-22 */
>  	page = RTL822X_VND2_TO_PAGE(reg);
>  	oldpage = __phy_read(phydev, RTL821x_PAGE_SELECT);
> @@ -1299,6 +1305,11 @@ static int rtl822xb_write_mmd(struct phy_device *phydev, int devnum, u16 reg,
>  		return mmd_phy_write(phydev->mdio.bus, phydev->mdio.addr,
>  				     phydev->is_c45, devnum, reg, val);
>  
> +	/* Simplify access to C22-registers addressed inside MDIO_MMD_VEND2 */
> +	if (reg >= RTL822X_VND2_C22_REG(0) &&
> +	    reg <= RTL822X_VND2_C22_REG(30))
> +		return __phy_write(phydev, RTL822X_VND2_TO_C22_REG(reg), val);
> +
>  	/* Use paged access for MDIO_MMD_VEND2 over Clause-22 */
>  	page = RTL822X_VND2_TO_PAGE(reg);
>  	oldpage = __phy_read(phydev, RTL821x_PAGE_SELECT);


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