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Message-Id: <20260109083808.1047-1-yuanjie.yang@oss.qualcomm.com>
Date: Fri, 9 Jan 2026 16:38:06 +0800
From: yuanjie yang <yuanjie.yang@....qualcomm.com>
To: robin.clark@....qualcomm.com, lumag@...nel.org, abhinav.kumar@...ux.dev,
jesszhan0024@...il.com, sean@...rly.run, marijn.suijten@...ainline.org,
airlied@...il.com, simona@...ll.ch, krzysztof.kozlowski@...aro.org,
konrad.dybcio@....qualcomm.com
Cc: linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
freedreno@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
tingwei.zhang@....qualcomm.com, aiqun.yu@....qualcomm.com,
yongxing.mou@....qualcomm.com
Subject: [PATCH 0/2] drm/msm: fix mismatch between power and frequency
From: Yuanjie Yang <yuanjie.yang@....qualcomm.com>
During DPU runtime suspend, calling dev_pm_opp_set_rate(dev, 0) drops
the MMCX rail to MIN_SVS while the core clock frequency remains at its
original (highest) rate. When runtime resume re-enables the clock, this
may result in a mismatch between the rail voltage and the clock rate.
Signed-off-by: Yuanjie Yang <yuanjie.yang@....qualcomm.com>
---
Yuanjie Yang (2):
drm/msm/dpu: fix mismatch between power and frequency
drm/msm/dpu: use max_freq replace max_core_clk_rate
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 22 ++++++++++++++--------
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 3 +++
2 files changed, 17 insertions(+), 8 deletions(-)
--
2.34.1
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