[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <aWC-jkgIR7Q4scxn@ryzen>
Date: Fri, 9 Jan 2026 09:38:38 +0100
From: Niklas Cassel <cassel@...nel.org>
To: Hans Zhang <18255117159@....com>
Cc: lpieralisi@...nel.org, kwilczynski@...nel.org, bhelgaas@...gle.com,
helgaas@...nel.org, heiko@...ech.de, mani@...nel.org,
yue.wang@...ogic.com, pali@...nel.org, neil.armstrong@...aro.org,
robh@...nel.org, jingoohan1@...il.com, khilman@...libre.com,
jbrunet@...libre.com, martin.blumenstingl@...glemail.com,
linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-amlogic@...ts.infradead.org,
linux-rockchip@...ts.infradead.org
Subject: Re: [PATCH v7 0/2] PCI: Configure Root Port MPS during host probing
On Fri, Nov 28, 2025 at 01:09:06AM +0800, Hans Zhang wrote:
> Current PCIe initialization exhibits a key optimization gap: Root Ports
> may operate with non-optimal Maximum Payload Size (MPS) settings. While
> downstream device configuration is handled during bus enumeration, Root
> Port MPS values inherited from firmware or hardware defaults often fail
> to utilize the full capabilities supported by controller hardware. This
> results in suboptimal data transfer efficiency throughout the PCIe
> hierarchy.
Hello PCI maintainers,
any chance for this series to be applied?
Kind regards,
Niklas
Powered by blists - more mailing lists