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Message-Id: <176795608886.1640392.11563131653526245122.b4-ty@kernel.org>
Date: Fri, 09 Jan 2026 10:54:48 +0000
From: Lee Jones <lee@...nel.org>
To: Lee Jones <lee@...nel.org>, Dan Carpenter <dan.carpenter@...aro.org>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, imx@...ts.linux.dev, linaro-s32@...aro.org,
NXP S32 Linux Team <s32@....com>
Subject: Re: (subset) [PATCH v2 2/4] dt-bindings: mfd: syscon: Document the
GPR syscon for the NXP S32 SoCs
On Mon, 15 Dec 2025 17:41:52 +0300, Dan Carpenter wrote:
> The NXP S32 SoCs have a GPR region which is used by a variety of
> drivers. Some examples of the registers in this region are:
>
> * DDR_PMU_IRQ
> * GMAC0_PHY_INTF_SEL
> * GMAC1_PHY_INTF_SEL
> * PFE_EMACS_INTF_SEL
> * PFE_COH_EN
> * PFE_PWR_CTRL
> * PFE_EMACS_GENCTRL1
> * PFE_GENCTRL3
>
> [...]
Applied, thanks!
[2/4] dt-bindings: mfd: syscon: Document the GPR syscon for the NXP S32 SoCs
commit: 441db0e922485befe0cfed2523e8e452a3b5f7cc
--
Lee Jones [李琼斯]
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