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Message-ID: <20260110110502-GYB12783@gentoo.org>
Date: Sat, 10 Jan 2026 19:05:02 +0800
From: Yixun Lan <dlan@...too.org>
To: Guodong Xu <guodong@...cstar.com>
Cc: Inochi Amaoto <inochiama@...il.com>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>, Paul Walmsley <pjw@...nel.org>,
	Palmer Dabbelt <palmer@...belt.com>,
	Albert Ou <aou@...s.berkeley.edu>, Alexandre Ghiti <alex@...ti.fr>,
	Daniel Lezcano <daniel.lezcano@...aro.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Samuel Holland <samuel.holland@...ive.com>,
	Anup Patel <anup@...infault.org>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Jiri Slaby <jirislaby@...nel.org>, Lubomir Rintel <lkundrak@...sk>,
	Yangyu Chen <cyy@...self.name>,
	Paul Walmsley <paul.walmsley@...ive.com>,
	Conor Dooley <conor@...nel.org>,
	Heinrich Schuchardt <xypron.glpk@....de>,
	Kevin Meng Zhang <zhangmeng.kevin@...ux.spacemit.com>,
	Andrew Jones <ajones@...tanamicro.com>, devicetree@...r.kernel.org,
	linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
	spacemit@...ts.linux.dev, linux-serial@...r.kernel.org
Subject: Re: [PATCH v4 10/11] riscv: dts: spacemit: add initial device tree
 of SpacemiT K3 SoC

Hi Guodong,

On 18:00 Sat 10 Jan     , Inochi Amaoto wrote:
> On Sat, Jan 10, 2026 at 01:18:22PM +0800, Guodong Xu wrote:
> > SpacemiT K3 is equipped with 8 X100 cores, which are RVA23 compliant.
> > Add nodes of uarts, timer and interrupt-controllers.
> > 
> > Signed-off-by: Guodong Xu <guodong@...cstar.com>
> > ---
> > v4: Fix missing blank space after commas in compatible string.
> >     Add m-mode imsic and aplic node.
> >     Reorder properties in simsic, saplic, mimsic, and maplic nodes
> >      to match DTS coding style.
> > v3: Remove "supm" from the riscv,isa-extensions list.
> > v2: Remove aliases from k3.dtsi, they should be in board DTS.
> >     Updated riscv,isa-extensions with new extensions from the extensions.yaml.
> > ---
> >  arch/riscv/boot/dts/spacemit/k3.dtsi | 590 +++++++++++++++++++++++++++++++++++
> >  1 file changed, 590 insertions(+)
> > 
> > diff --git a/arch/riscv/boot/dts/spacemit/k3.dtsi b/arch/riscv/boot/dts/spacemit/k3.dtsi
> > new file mode 100644
> > index 000000000000..a815f85cf5a6
> > --- /dev/null
> > +++ b/arch/riscv/boot/dts/spacemit/k3.dtsi
> > @@ -0,0 +1,590 @@
...
> > +			d-cache-sets = <256>;
> > +			next-level-cache = <&l2_cache0>;
> 
> > +			mmu-type = "riscv,sv39";
> 
> I think this should be riscv,sv48? IIRC K3 supports it.
> 
I would second the idea here, if the underlying hardware support sv48,
there is no reason we should limit it in DTS, DT should reflect the actual
hardware.. if user still prefer to use sv39 for simplicity, a "no4lvl"
command line argument can be passed.. see 
 arch/riscv/mm/init.c +860 -> set_satp_mode()

-- 
Yixun Lan (dlan)

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