linux-kernel - [PATCH 19/36] rust: sync: atomic: Add i8/i16 xchg and cmpxchg support

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Message-ID: <20260111120209.6133-17-boqun.feng@gmail.com>
Date: Sun, 11 Jan 2026 20:01:52 +0800
From: Boqun Feng <boqun.feng@...il.com>
To: "Peter Zijlstra" <peterz@...radead.org>,
	"Ingo Molnar" <mingo@...nel.org>
Cc: rust-for-linux@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	"Will Deacon" <will@...nel.org>,
	"Mark Rutland" <mark.rutland@....com>,
	"Thomas Gleixner" <tglx@...utronix.de>,
	"Miguel Ojeda" <ojeda@...nel.org>,
	"Gary Guo" <gary@...yguo.net>,
	"Alice Ryhl" <aliceryhl@...gle.com>,
	"Andreas Hindborg" <a.hindborg@...nel.org>,
	"Benno Lossin" <lossin@...nel.org>,
	"Danilo Krummrich" <dakr@...nel.org>,
	FUJITA Tomonori <fujita.tomonori@...il.com>,
	Boqun Feng <boqun.feng@...il.com>
Subject: [PATCH 19/36] rust: sync: atomic: Add i8/i16 xchg and cmpxchg support

From: FUJITA Tomonori <fujita.tomonori@...il.com>

Add atomic xchg and cmpxchg operation support for i8 and i16 types
with tests.

Note that since the current implementation of
Atomic::<{i8,i16}>::{load,store}() is READ_ONCE()/WRITE_ONCE()-based.
The atomicity between load/store and xchg/cmpxchg is only guaranteed if
the architecture has native RmW support, hence i8/i16 is currently
AtomicImpl only when CONFIG_ARCH_SUPPORTS_ATOMIC_RWM=y.

[boqun: Make i8/i16 AtomicImpl only when
CONFIG_ARCH_SUPPORTS_ATOMIC_RWM=y]

Signed-off-by: FUJITA Tomonori <fujita.tomonori@...il.com>
Signed-off-by: Boqun Feng <boqun.feng@...il.com>
Link: https://patch.msgid.link/20251228120546.1602275-4-fujita.tomonori@gmail.com
---
 rust/kernel/sync/atomic/internal.rs  | 8 +++++++-
 rust/kernel/sync/atomic/predefine.rs | 4 ++--
 2 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/rust/kernel/sync/atomic/internal.rs b/rust/kernel/sync/atomic/internal.rs
index 1b2a7933bc14..0dac58bca2b3 100644
--- a/rust/kernel/sync/atomic/internal.rs
+++ b/rust/kernel/sync/atomic/internal.rs
@@ -37,10 +37,16 @@ pub trait AtomicImpl: Sized + Send + Copy + private::Sealed {
     type Delta;
 }
 
+// The current helpers of load/store uses `{WRITE,READ}_ONCE()` hence the atomicity is only
+// guaranteed against read-modify-write operations if the architecture supports native atomic RmW.
+#[cfg(CONFIG_ARCH_SUPPORTS_ATOMIC_RMW)]
 impl AtomicImpl for i8 {
     type Delta = Self;
 }
 
+// The current helpers of load/store uses `{WRITE,READ}_ONCE()` hence the atomicity is only
+// guaranteed against read-modify-write operations if the architecture supports native atomic RmW.
+#[cfg(CONFIG_ARCH_SUPPORTS_ATOMIC_RMW)]
 impl AtomicImpl for i16 {
     type Delta = Self;
 }
@@ -274,7 +280,7 @@ fn set[release](a: &AtomicRepr<Self>, v: Self) {
 );
 
 declare_and_impl_atomic_methods!(
-    [ i32 => atomic, i64 => atomic64 ]
+    [ i8 => atomic_i8, i16 => atomic_i16, i32 => atomic, i64 => atomic64 ]
     /// Exchange and compare-and-exchange atomic operations
     pub trait AtomicExchangeOps {
         /// Atomic exchange.
diff --git a/rust/kernel/sync/atomic/predefine.rs b/rust/kernel/sync/atomic/predefine.rs
index 51e9df0cf56e..248d26555ccf 100644
--- a/rust/kernel/sync/atomic/predefine.rs
+++ b/rust/kernel/sync/atomic/predefine.rs
@@ -149,7 +149,7 @@ fn atomic_acquire_release_tests() {
 
     #[test]
     fn atomic_xchg_tests() {
-        for_each_type!(42 in [i32, i64, u32, u64, isize, usize] |v| {
+        for_each_type!(42 in [i8, i16, i32, i64, u32, u64, isize, usize] |v| {
             let x = Atomic::new(v);
 
             let old = v;
@@ -162,7 +162,7 @@ fn atomic_xchg_tests() {
 
     #[test]
     fn atomic_cmpxchg_tests() {
-        for_each_type!(42 in [i32, i64, u32, u64, isize, usize] |v| {
+        for_each_type!(42 in [i8, i16, i32, i64, u32, u64, isize, usize] |v| {
             let x = Atomic::new(v);
 
             let old = v;
-- 
2.51.0