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Message-ID: <df9d1dbd52f6b21d660e6f0910215aba1e6a3841.1768187095.git.tzeyee.ng@altera.com>
Date: Sun, 11 Jan 2026 19:35:28 -0800
From: tzeyee.ng@...era.com
To: Dinh Nguyen <dinguyen@...nel.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH] arm64: dts: socfpga: agilex: add emmc support
From: Ng Tze Yee <tzeyee.ng@...era.com>
The Agilex devkit supports a separate NAND/eMMC daughter card. The
NAND/eMMC daughter card replaces the SDMMC slot that is on the default
daughter card and thus requires a separate board dts file.
New eMMC dts which is based on the existing NAND dts, which is
needed to comply with spec in which eMMC board ID is designated as 2.
Signed-off-by: Ng Tze Yee <tzeyee.ng@...era.com>
---
arch/arm64/boot/dts/intel/Makefile | 1 +
.../dts/intel/socfpga_agilex_socdk_emmc.dts | 105 ++++++++++++++++++
2 files changed, 106 insertions(+)
create mode 100644 arch/arm64/boot/dts/intel/socfpga_agilex_socdk_emmc.dts
diff --git a/arch/arm64/boot/dts/intel/Makefile b/arch/arm64/boot/dts/intel/Makefile
index a117268267ee..6f4da79725de 100644
--- a/arch/arm64/boot/dts/intel/Makefile
+++ b/arch/arm64/boot/dts/intel/Makefile
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-only
dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_agilex_n6000.dtb \
socfpga_agilex_socdk.dtb \
+ socfpga_agilex_socdk_emmc.dtb \
socfpga_agilex_socdk_nand.dtb \
socfpga_agilex3_socdk.dtb \
socfpga_agilex5_socdk.dtb \
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_emmc.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_emmc.dts
new file mode 100644
index 000000000000..5caf231de370
--- /dev/null
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_emmc.dts
@@ -0,0 +1,105 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2026, Intel Corporation
+ */
+#include "socfpga_agilex.dtsi"
+
+/ {
+ model = "SoCFPGA Agilex SoCDK";
+ compatible = "intel,socfpga-agilex-socdk", "intel,socfpga-agilex";
+
+ aliases {
+ serial0 = &uart0;
+ ethernet0 = &gmac0;
+ ethernet1 = &gmac1;
+ ethernet2 = &gmac2;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ led0 {
+ label = "hps_led0";
+ gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
+ };
+
+ led1 {
+ label = "hps_led1";
+ gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
+ };
+
+ led2 {
+ label = "hps_led2";
+ gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ memory@...00000 {
+ device_type = "memory";
+ /* We expect the bootloader to fill in the reg */
+ reg = <0 0x80000000 0 0>;
+ };
+};
+
+&gpio1 {
+ status = "okay";
+};
+
+&gmac2 {
+ status = "okay";
+ /* PHY delays is configured via skew properties */
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+
+ max-frame-size = <9000>;
+
+ mdio0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ phy0: ethernet-phy@0 {
+ reg = <4>;
+
+ txd0-skew-ps = <0>; /* -420ps */
+ txd1-skew-ps = <0>; /* -420ps */
+ txd2-skew-ps = <0>; /* -420ps */
+ txd3-skew-ps = <0>; /* -420ps */
+ rxd0-skew-ps = <420>; /* 0ps */
+ rxd1-skew-ps = <420>; /* 0ps */
+ rxd2-skew-ps = <420>; /* 0ps */
+ rxd3-skew-ps = <420>; /* 0ps */
+ txen-skew-ps = <0>; /* -420ps */
+ txc-skew-ps = <900>; /* 0ps */
+ rxdv-skew-ps = <420>; /* 0ps */
+ rxc-skew-ps = <1680>; /* 780ps */
+ };
+ };
+};
+
+&mmc {
+ status = "okay";
+ cap-mmc-highspeed;
+ broken-cd;
+ bus-width = <4>;
+ clk-phase-sd-hs = <0>, <135>;
+};
+
+&osc1 {
+ clock-frequency = <25000000>;
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+ disable-over-current;
+};
+
+&watchdog0 {
+ status = "okay";
+};
--
2.25.1
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