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Message-ID: <F4CDF36128041430+0d030e3b-054c-4910-a132-72273c541948@radxa.com>
Date: Mon, 12 Jan 2026 14:31:16 +0800
From: Xilin Wu <sophon@...xa.com>
To: Jessica Zhang <jessica.zhang@....qualcomm.com>,
Rob Clark <robdclark@...il.com>, Dmitry Baryshkov <lumag@...nel.org>,
Sean Paul <sean@...rly.run>, Marijn Suijten <marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>
Cc: Abhinav Kumar <quic_abhinavk@...cinc.com>, linux-arm-msm@...r.kernel.org,
dri-devel@...ts.freedesktop.org, freedreno@...ts.freedesktop.org,
linux-kernel@...r.kernel.org, Neil Armstrong <neil.armstrong@...aro.org>,
Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Subject: Re: [PATCH v2] drm/msm/dpu: Filter modes based on adjusted mode clock
On 5/7/2025 9:38 AM, Jessica Zhang wrote:
> Filter out modes that have a clock rate greater than the max core clock
> rate when adjusted for the perf clock factor
>
> This is especially important for chipsets such as QCS615 that have lower
> limits for the MDP max core clock.
>
> Since the core CRTC clock is at least the mode clock (adjusted for the
> perf clock factor) [1], the modes supported by the driver should be less
> than the max core clock rate.
>
> [1] https://elixir.bootlin.com/linux/v6.12.4/source/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c#L83
>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
> Signed-off-by: Jessica Zhang <jessica.zhang@....qualcomm.com>
> ---
Hi. This patch effectively filters out the 3840x2160@...Hz mode on
SC8280XP CRD. The calculated adjusted_mode_clk is 623700, which slightly
exceeds the supported max core clock of 600000.
However, 4K 120Hz works flawlessly with the limit removed on this
platform. I even tried connecting two 4K 120Hz displays, and they can
work properly simultaneously. Is it possible to bring back support for
this mode, or adjust the limits?
--
Best regards,
Xilin Wu <sophon@...xa.com>
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