linux-kernel - Re: [PATCH v3 2/2] phy: cadence-torrent: Add PCIe + XAUI multilink configuration for 100MHz refclk

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Message-ID: <38da25fd-a402-4b34-8131-0655bccc1953@lunn.ch>
Date: Mon, 12 Jan 2026 14:05:10 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Siddharth Vadapalli <s-vadapalli@...com>
Cc: vkoul@...nel.org, neil.armstrong@...aro.org, robh@...nel.org,
	krzk+dt@...nel.org, conor+dt@...nel.org, sjakhade@...ence.com,
	rogerq@...nel.org, thomas.richard@...tlin.com,
	linux-phy@...ts.infradead.org, linux-kernel@...r.kernel.org,
	devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	srk@...com
Subject: Re: [PATCH v3 2/2] phy: cadence-torrent: Add PCIe + XAUI multilink
 configuration for 100MHz refclk

On Mon, Jan 12, 2026 at 11:16:31AM +0530, Siddharth Vadapalli wrote:
> From: Swapnil Jakhade <sjakhade@...ence.com>
> 
> Add register sequences for PCIe + XAUI multilink configuration for
> 100MHz reference clock.
> 
> The register sequences are fetched from a table by indexing entries based
> on unique 'keys' generated by the Bitwise OR defined below:
> 	REFCLK0_RATE | REFCLK1_RATE | LINK0_TYPE | LINK1_TYPE | SSC_TYPE
> 
> As of now, LINK_TYPE is a 3-bit value corresponding to the PHY type.
> With the introduction of TYPE_XAUI, we need a 4-bit value to represent
> the LINK_TYPE as TYPE_XAUI has the numerical value 8. Hence, extend the
> LINKx_MASK macros to 4-bit masks. While at it, extend REFCLKx_MASK macros
> as well to 4-bit masks to support reference clock frequencies that will be
> added in the future.
> 
> Adjust the 'LINKx_SHIFT' and the 'REFCLKx_SHIFT' macros to account for
> the aforementioned changes made to the masks.
> 
> Signed-off-by: Swapnil Jakhade <sjakhade@...ence.com>
> [s-vadapalli: elaborated on changes made to macros in the commit message]
> Signed-off-by: Siddharth Vadapalli <s-vadapalli@...com>

Reviewed-by: Andrew Lunn <andrew@...n.ch>

    Andrew