linux-kernel - Re: [PATCH v2 1/3] dt-bindings: dma: arm-dma350: update DT binding docs for cix sky1 SoC

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Message-ID: <2cef1db3-809f-4768-a5ca-c148a03f3d79@cixtech.com>
Date: Tue, 13 Jan 2026 10:05:08 +0800
From: Jun Guo <jun.guo@...tech.com>
To: Robin Murphy <robin.murphy@....com>, peter.chen@...tech.com,
 fugang.duan@...tech.com, robh@...nel.org, krzk+dt@...nel.org,
 conor+dt@...nel.org, vkoul@...nel.org, ychuang3@...oton.com,
 schung@...oton.com
Cc: dmaengine@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, cix-kernel-upstream@...tech.com,
 linux-arm-kernel@...ts.infradead.org, jelly.jia@...tech.com
Subject: Re: [PATCH v2 1/3] dt-bindings: dma: arm-dma350: update DT binding
 docs for cix sky1 SoC

Hi Robin,

  Looking forward to your reply.

On 12/16/2025 8:43 PM, Robin Murphy wrote:
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> 
> On 2025-12-16 12:30 pm, Jun Guo wrote:
>> Add SoC-specific compatible strings to the DT binding documents to 
>> support
>> cix sky1 SoC.
>>
>> When adding support for a new SoC that uses the arm dma controller,
>> future contributors should be encouraged to actually add SoC-specific
>> compatible strings. The use of the "arm,dma-350" compatible string in
>> isolation should be disallowed.
> 
> No, you've missed the point - however many channels the hardware
> implements, the DT should list that many interrupt specifiers; it
> doesn't matter whether any of them happen to be the same.
> 
The interrupts defined in the device tree are based on the hardware 
interrupt numbers of the GIC, not the DMA interrupt specifiers. 
Therefore, I believe it is not possible to configure them as you 
suggested. If you have a demo, you could share it for reference. 
Typically, interrupts in the device tree are defined as follows:

interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>;

> Thanks,
> Robin.
> 
>> Signed-off-by: Jun Guo <jun.guo@...tech.com>
>> ---
>>   .../devicetree/bindings/dma/arm,dma-350.yaml  | 31 +++++++++++++------
>>   1 file changed, 21 insertions(+), 10 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/dma/arm,dma-350.yaml b/ 
>> Documentation/devicetree/bindings/dma/arm,dma-350.yaml
>> index 429f682f15d8..78bcc7f9aa8b 100644
>> --- a/Documentation/devicetree/bindings/dma/arm,dma-350.yaml
>> +++ b/Documentation/devicetree/bindings/dma/arm,dma-350.yaml
>> @@ -14,7 +14,11 @@ allOf:
>>
>>   properties:
>>     compatible:
>> -    const: arm,dma-350
>> +    oneOf:
>> +      - items:
>> +          - enum:
>> +              - cix,sky1-dma-350
>> +          - const: arm,dma-350
>>
>>     reg:
>>       items:
>> @@ -22,15 +26,22 @@ properties:
>>
>>     interrupts:
>>       minItems: 1
>> -    items:
>> -      - description: Channel 0 interrupt
>> -      - description: Channel 1 interrupt
>> -      - description: Channel 2 interrupt
>> -      - description: Channel 3 interrupt
>> -      - description: Channel 4 interrupt
>> -      - description: Channel 5 interrupt
>> -      - description: Channel 6 interrupt
>> -      - description: Channel 7 interrupt
>> +    maxItems: 8
>> +    description: |
>> +      The DMA controller may be configured with separate interrupts 
>> for each channel,
>> +      or with a single combined interrupt for all channels, depending 
>> on the SoC integration.
>> +    oneOf:
>> +      - items:
>> +          - description: Channel 0 interrupt
>> +          - description: Channel 1 interrupt
>> +          - description: Channel 2 interrupt
>> +          - description: Channel 3 interrupt
>> +          - description: Channel 4 interrupt
>> +          - description: Channel 5 interrupt
>> +          - description: Channel 6 interrupt
>> +          - description: Channel 7 interrupt
>> +      - items:
>> +          - description: Combined interrupt shared by all channels
>>
>>     "#dma-cells":
>>       const: 1
> 

Best wishes,
Jun Guo