linux-kernel - Re: [PATCH v2 2/2] arm64: dts: socfpga: agilex: add emmc support

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Message-ID: <ba8192c7-d452-4ee3-bfc7-eedff746e590@kernel.org>
Date: Wed, 14 Jan 2026 06:42:43 -0600
From: Dinh Nguyen <dinguyen@...nel.org>
To: tzeyee.ng@...era.com, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 2/2] arm64: dts: socfpga: agilex: add emmc support



On 1/14/26 03:42, tzeyee.ng@...era.com wrote:
> From: Ng Tze Yee <tzeyee.ng@...era.com>
> 
> The Agilex devkit supports a separate eMMC daughter card. The
> eMMC daughter card replaces the SDMMC slot that is on the default
> daughter card and thus requires a separate board dts file.
> 
> Signed-off-by: Ng Tze Yee <tzeyee.ng@...era.com>
> ---
> Changes in v2:
> - Fix space indentation in socfpga_agilex_socdk_emmc.dts
> - Fix compatible string in socfpga_agilex_socdk_emmc.dts
> - Rephase commit messages for clarity
> ---
>   arch/arm64/boot/dts/intel/Makefile            |   1 +
>   .../dts/intel/socfpga_agilex_socdk_emmc.dts   | 105 ++++++++++++++++++
>   2 files changed, 106 insertions(+)
>   create mode 100644 arch/arm64/boot/dts/intel/socfpga_agilex_socdk_emmc.dts
> 
> diff --git a/arch/arm64/boot/dts/intel/Makefile b/arch/arm64/boot/dts/intel/Makefile
> index a117268267ee..6f4da79725de 100644
> --- a/arch/arm64/boot/dts/intel/Makefile
> +++ b/arch/arm64/boot/dts/intel/Makefile
> @@ -1,6 +1,7 @@
>   # SPDX-License-Identifier: GPL-2.0-only
>   dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_agilex_n6000.dtb \
>   				socfpga_agilex_socdk.dtb \
> +				socfpga_agilex_socdk_emmc.dtb \
>   				socfpga_agilex_socdk_nand.dtb \
>   				socfpga_agilex3_socdk.dtb \
>   				socfpga_agilex5_socdk.dtb \
> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_emmc.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_emmc.dts
> new file mode 100644
> index 000000000000..c616c1eb6f1c
> --- /dev/null
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_emmc.dts
> @@ -0,0 +1,105 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2026, Intel Corporation

This should be Altera.

> + */
> +#include "socfpga_agilex.dtsi"
> +
> +/ {
> +	model = "SoCFPGA Agilex SoCDK";

Please append "eMMC daughter board" to the model.

> +	compatible = "intel,socfpga-agilex-socdk-emmc", "intel,socfpga-agilex";
> +
> +	aliases {
> +		serial0 = &uart0;
> +		ethernet0 = &gmac0;
> +		ethernet1 = &gmac1;
> +		ethernet2 = &gmac2;
> +	};
> +
> +	chosen {
> +		stdout-path = "serial0:115200n8";
> +	};
> +
> +	leds {
> +		compatible = "gpio-leds";
> +		led0 {
> +			label = "hps_led0";
> +			gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
> +		};
> +
> +		led1 {
> +			label = "hps_led1";
> +			gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
> +		};
> +
> +		led2 {
> +			label = "hps_led2";
> +			gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
> +		};
> +	};
> +
> +	memory@...00000 {
> +		device_type = "memory";
> +		/* We expect the bootloader to fill in the reg */
> +		reg = <0 0x80000000 0 0>;
> +	};
> +};
> +
> +&gpio1 {
> +	status = "okay";
> +};
> +
> +&gmac2 {
> +	status = "okay";
> +	/* PHY delays is configured via skew properties */
> +	phy-mode = "rgmii";
> +	phy-handle = <&phy0>;
> +
> +	max-frame-size = <9000>;
> +
> +	mdio0 {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		compatible = "snps,dwmac-mdio";
> +		phy0: ethernet-phy@0 {

This should be ethernet-phy@4

Dinh