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Message-ID: <873448w7j3.fsf@bootlin.com>
Date: Wed, 14 Jan 2026 16:14:40 +0100
From: Miquel Raynal <miquel.raynal@...tlin.com>
To: Krzysztof Kozlowski <krzk@...nel.org>
Cc: Mark Brown <broonie@...nel.org>,  Rob Herring <robh@...nel.org>,
  Krzysztof Kozlowski <krzk+dt@...nel.org>,  Conor Dooley
 <conor+dt@...nel.org>,  Geert Uytterhoeven <geert+renesas@...der.be>,
  Magnus Damm <magnus.damm@...il.com>,  Vaishnav Achath
 <vaishnav.a@...com>,  Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
  Hervé Codina <herve.codina@...tlin.com>,  Wolfram Sang
 <wsa+renesas@...g-engineering.com>,  Vignesh Raghavendra
 <vigneshr@...com>,  Santhosh Kumar K <s-k6@...com>,  Pratyush Yadav
 <pratyush@...nel.org>,  Pascal Eberhard <pascal.eberhard@...com>,
  linux-spi@...r.kernel.org,  devicetree@...r.kernel.org,
  linux-kernel@...r.kernel.org,  linux-renesas-soc@...r.kernel.org
Subject: Re: [PATCH 01/13] spi: dt-bindings: cdns,qspi-nor: Add Renesas
 RZ/N1D400 to the list

On 20/12/2025 at 10:35:56 +01, Krzysztof Kozlowski <krzk@...nel.org> wrote:

> On Fri, Dec 19, 2025 at 08:22:03PM +0100, Miquel Raynal (Schneider Electric) wrote:
>> Add support for the Renesas RZ/N1D400 QSPI controller.
>> 
>> This SoC is identified in the bindings with its other name: r9a06g032.
>> It is part of the RZ/N1 family, which contains a "D" and a "S"
>> variant. Align the compatibles used with all other IPs from the same
>
> I don't get it. I see only one front compatible, so what is exactly
> aligned?

Sorry, indeed the sentence isn't clear. The Cadence QSPI IP is usually
described using two compatibles, and the second is cdns,qspi-nor.

The way that has been historically used to describe RZ/N1D IPs, however,
is to use 3 compatibles. I wanted to "align" with this, ie. declaring 3
strings instead of 2.

I will change the commit log to:

    This SoC is identified in the bindings with its other name: r9a06g032.
    It is part of the RZ/N1 family, which contains a "D" and a "S"
    variant. IPs in this SoC are typically described using 3
    compatibles (the SoC specific compatible, the family compatible, and
    the original Cadence IP compatible), follow this convention.

I hope this is clearer.

Thanks,
Miquèl

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