linux-kernel - Re: [PATCH v10 0/2] Add Google Tensor SoC USB PHY support

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Message-Id: <176840952204.979558.17473922474901235501.b4-ty@kernel.org>
Date: Wed, 14 Jan 2026 22:22:02 +0530
From: Vinod Koul <vkoul@...nel.org>
To: Kishon Vijay Abraham I <kishon@...nel.org>, 
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, 
 Peter Griffin <peter.griffin@...aro.org>, 
 André Draszik <andre.draszik@...aro.org>, 
 Tudor Ambarus <tudor.ambarus@...aro.org>, 
 Philipp Zabel <p.zabel@...gutronix.de>, 
 Neil Armstrong <neil.armstrong@...aro.org>, Roy Luo <royluo@...gle.com>
Cc: Badhri Jagan Sridharan <badhri@...gle.com>, 
 Doug Anderson <dianders@...gle.com>, linux-phy@...ts.infradead.org, 
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
 linux-arm-kernel@...ts.infradead.org, linux-samsung-soc@...r.kernel.org, 
 Joy Chakraborty <joychakr@...gle.com>, Naveen Kumar <mnkumar@...gle.com>, 
 Krzysztof Kozlowski <krzysztof.kozlowski@....qualcomm.com>
Subject: Re: [PATCH v10 0/2] Add Google Tensor SoC USB PHY support


On Sat, 27 Dec 2025 00:53:27 +0000, Roy Luo wrote:
> This series introduces USB PHY support for the Google Tensor G5
> SoC (codename: Laguna), a new generation of Google silicon first
> launched with Pixel 10 devices.
> 
> The Tensor G5 represents a significant architectural overhaul compared
> to previous Tensor generations (e.g., gs101), which were based on Samsung
> Exynos IP. Although the G5 still utilizes Synopsys IP for the USB
> components, the custom top-level integration introduces a completely new
> design for clock, reset scheme, register interfaces and programming
> sequence, necessitating new drivers and device tree bindings.
> 
> [...]

Applied, thanks!

[1/2] dt-bindings: phy: google: Add Google Tensor G5 USB PHY
      commit: 876dc58c3fa532e38cd1b287a7b8143a1a4c5dc7
[2/2] phy: Add Google Tensor SoC USB PHY driver
      commit: cbce66669c82ee9ae0e26523c0fcd3c721fcfe85

Best regards,
-- 
~Vinod