linux-kernel - Re: [PATCH V2 2/2] soundwire: amd: refactor bandwidth calculation logic

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <e1383cb2-d506-4adf-a7e1-2c5d168555bc@amd.com>
Date: Wed, 14 Jan 2026 05:30:48 +0530
From: "Mukunda,Vijendar" <vijendar.mukunda@....com>
To: Pierre-Louis Bossart <pierre-louis.bossart@...ux.dev>, vkoul@...nel.org
Cc: yung-chuan.liao@...ux.intel.com, Sunil-kumar.Dommati@....com,
 mario.limonciello@....com, linux-sound@...r.kernel.org,
 linux-kernel@...r.kernel.org, Mario Limonciello <superm1@...nel.org>
Subject: Re: [PATCH V2 2/2] soundwire: amd: refactor bandwidth calculation
 logic

On 14/01/26 03:09, Pierre-Louis Bossart wrote:
> On 1/13/26 15:13, Vijendar Mukunda wrote:
>> For ACP6.3/7.0/7.1/7.2 platforms, amd SoundWire manager doesn't have
>> banked registers concept. For bandwidth calculation, need to use static
>> mapping for block offset calculation based on master port request.
>> Refactor bandwidth calculation logic to support 6Mhz bus clock frequency
>> with frame size as 50 x 10, 125 x 2 and 12Mhz bus clock frequency with
>> frame size as 50 x 10 based on static port block offset logic.
> Consider rewriting this commit message, it's quite unclear how you went from 'no banked registers' to static mapping of block offset calculation logic. There's also a built-in contradiction between the need for bandwidth calculation and static mappings. If you force a specific port to use a specific part of the frame, then you don't really need to calculate the bandwidth, do you? Or maybe only to control that the space allocated statically for the port is enough for a stream.
>
> In addition the text says both 6 and 12 MHz are supported, but....

For Current platforms(ACP6.3/ACP7.0/ACP7.1/ACP7.2), AMD SoundWire manager
doesn't have banked registers for data port programming on Manager side, 
so we need to use fixed block offsets , hstart & hstop for manager ports.

Earlier we only support 12Mhz frequency with frame shape as 50 x10 with fixed block
offset mapping based on port number, i.e. For example for ACP7.0 platform,
we have two SoundWire instances where it can support 3 TX ports and 3 RX ports.
Else condition logic points to block offset calculation based on port number.

amd_manager->port_offset_map[p_rt->num] =  (p_rt->num * 64) + 1;

Now we got a requirement to support 6Mhz bus clock frequency with different frame
shapes, i.e 125 x2 and 50 x 10.

First, if condition checks for 6Mhz frequency. As max available bit slots vary
based on
frame shape, we have implemented logic to calculate block offset for a port where 
it should use fixed block offset for that port.

Will update the commit message, add comments in the code.



>
>
>> +			/* Static mapping logic */
>> +			if (!amd_manager->port_offset_map[p_rt->num]) {
>> +				if (bus->params.curr_dr_freq == 12000000) {
> .... this only deals with 6MHz bus clock. 
>
>> +					max_slots = bus->params.row * (bus->params.col - 1);
>> +					if (next_offset[inst_id] + stream_slot_size <=
>> +					    (max_slots - 1)) {
>> +						amd_manager->port_offset_map[p_rt->num] =
>> +									next_offset[inst_id];
>> +						next_offset[inst_id] += stream_slot_size;
>> +					} else {
>> +						dev_err(bus->dev,
>> +							"No space for port %d\n", p_rt->num);
>> +						return -ENOMEM;
>> +					}
>> +				} else {
>> +					amd_manager->port_offset_map[p_rt->num] =
>> +									(p_rt->num * 64) + 1;
> ... and this doesn't seem related to 12 MHz.
>
>> +				}
>> +			}
>> +			port_bo = amd_manager->port_offset_map[p_rt->num];
>> +			dev_dbg(bus->dev,
>> +				"Port=%d hstart=%d hstop=%d port_bo=%d slots=%d max_ports=%d\n",
>> +				p_rt->num, hstart, hstop, port_bo, stream_slot_size,
>> +				amd_manager->max_ports);
>> +
>>  			sdw_fill_xport_params(&p_rt->transport_params, p_rt->num,
>>  					      false, SDW_BLK_GRP_CNT_1, sample_int,
>>  					      port_bo, port_bo >> 8, hstart, hstop,
>> @@ -1093,6 +1130,11 @@ static int amd_sdw_manager_probe(struct platform_device *pdev)
>>  	default:
>>  		return -EINVAL;
>>  	}
>> +	amd_manager->max_ports = amd_manager->num_dout_ports + amd_manager->num_din_ports;
>> +	amd_manager->port_offset_map = devm_kcalloc(dev, amd_manager->max_ports,
>> +						    sizeof(int), GFP_KERNEL);
>> +	if (!amd_manager->port_offset_map)
>> +		return -ENOMEM;
>>  
>>  	prop = &amd_manager->bus.prop;
>>  	prop->mclk_freq = AMD_SDW_BUS_BASE_FREQ;
>> diff --git a/include/linux/soundwire/sdw_amd.h b/include/linux/soundwire/sdw_amd.h
>> index fe31773d5210..470360a2723c 100644
>> --- a/include/linux/soundwire/sdw_amd.h
>> +++ b/include/linux/soundwire/sdw_amd.h
>> @@ -66,8 +66,10 @@ struct sdw_amd_dai_runtime {
>>   * @status: peripheral devices status array
>>   * @num_din_ports: number of input ports
>>   * @num_dout_ports: number of output ports
>> + * @max_ports: total number of input ports and output ports
>>   * @cols_index: Column index in frame shape
>>   * @rows_index: Rows index in frame shape
>> + * @port_offset_map: dynamic array to map port block offset
>>   * @instance: SoundWire manager instance
>>   * @quirks: SoundWire manager quirks
>>   * @wake_en_mask: wake enable mask per SoundWire manager
>> @@ -92,10 +94,12 @@ struct amd_sdw_manager {
>>  
>>  	int num_din_ports;
>>  	int num_dout_ports;
>> +	int max_ports;
>>  
>>  	int cols_index;
>>  	int rows_index;
>>  
>> +	int *port_offset_map;
>>  	u32 instance;
>>  	u32 quirks;
>>  	u32 wake_en_mask;