linux-kernel - Re: [PATCH v14 13/34] PCI/AER: Replace PCIEAER_CXL symbol with CXL

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Message-ID: <afb9bfb9-17fd-45c4-8852-b3cbdcae9c12@intel.com>
Date: Wed, 14 Jan 2026 13:50:30 -0700
From: Dave Jiang <dave.jiang@...el.com>
To: Terry Bowman <terry.bowman@....com>, dave@...olabs.net,
 jonathan.cameron@...wei.com, alison.schofield@...el.com,
 dan.j.williams@...el.com, bhelgaas@...gle.com, shiju.jose@...wei.com,
 ming.li@...omail.com, Smita.KoralahalliChannabasappa@....com,
 rrichter@....com, dan.carpenter@...aro.org,
 PradeepVineshReddy.Kodamati@....com, lukas@...ner.de,
 Benjamin.Cheatham@....com, sathyanarayanan.kuppuswamy@...ux.intel.com,
 linux-cxl@...r.kernel.org, vishal.l.verma@...el.com, alucerop@....com,
 ira.weiny@...el.com
Cc: linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org
Subject: Re: [PATCH v14 13/34] PCI/AER: Replace PCIEAER_CXL symbol with
 CXL_RAS



On 1/14/26 11:20 AM, Terry Bowman wrote:
> From: Dan Williams <dan.j.williams@...el.com>
> 
> One of the primary reasons for the CXL driver to exist is to perform error
> handling. If both PCIEAER and CXL are enabled then light up CXL error
> handling as well. The work to remove CONFIG_PCIEAER_CXL started in:
> 
> commit 4ae6ae66649c ("cxl/pci: Remove CXL VH handling in CONFIG_PCIEAER_CXL conditional blocks from core/pci.c")
> 
> Finish that off with conditionally compiling all CXL RAS related helpers
> with CONFIG_CXL_RAS.
> 
> Signed-off-by: Dan Williams <dan.j.williams@...el.com>
> Reviewed-by: Terry Bowman <terry.bowman@....com>

Terry, if you are including this patch from Dan in your series, you need to sign off on it.

> 
> ----
> 
> Changes in v13->v14:
> - New commit
> ---
>  drivers/cxl/Kconfig      | 2 +-
>  drivers/pci/pcie/Kconfig | 9 ---------
>  2 files changed, 1 insertion(+), 10 deletions(-)
> 
> diff --git a/drivers/cxl/Kconfig b/drivers/cxl/Kconfig
> index 217888992c88..70acddc08c39 100644
> --- a/drivers/cxl/Kconfig
> +++ b/drivers/cxl/Kconfig
> @@ -235,6 +235,6 @@ config CXL_MCE
>  
>  config CXL_RAS
>  	def_bool y
> -	depends on ACPI_APEI_GHES && PCIEAER && CXL_PCI
> +	depends on ACPI_APEI_GHES && PCIEAER && CXL_BUS
>  
>  endif
> diff --git a/drivers/pci/pcie/Kconfig b/drivers/pci/pcie/Kconfig
> index 17919b99fa66..207c2deae35f 100644
> --- a/drivers/pci/pcie/Kconfig
> +++ b/drivers/pci/pcie/Kconfig
> @@ -49,15 +49,6 @@ config PCIEAER_INJECT
>  	  gotten from:
>  	     https://github.com/intel/aer-inject.git
>  
> -config PCIEAER_CXL
> -	bool "PCI Express CXL RAS support"
> -	default y
> -	depends on PCIEAER && CXL_PCI
> -	help
> -	  Enables CXL error handling.
> -
> -	  If unsure, say Y.
> -
>  #
>  # PCI Express ECRC
>  #