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Message-ID: <aWdn_j7SOKq97vpY@smile.fi.intel.com>
Date: Wed, 14 Jan 2026 11:55:10 +0200
From: Andy Shevchenko <andriy.shevchenko@...el.com>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
jic23@...nel.org, dlechner@...libre.com, nuno.sa@...log.com,
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dmitry.baryshkov@....qualcomm.com, quic_wcheng@...cinc.com,
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Subject: Re: [PATCH v7 05/10] nvmem: qcom-spmi-sdam: Migrate to
devm_spmi_subdevice_alloc_and_add()
On Wed, Jan 14, 2026 at 10:47:20AM +0100, Konrad Dybcio wrote:
> On 1/14/26 10:42 AM, Andy Shevchenko wrote:
> > On Wed, Jan 14, 2026 at 10:09:45AM +0100, AngeloGioacchino Del Regno wrote:
> >> Il 14/01/26 10:07, Andy Shevchenko ha scritto:
> >>> On Wed, Jan 14, 2026 at 10:03:57AM +0100, AngeloGioacchino Del Regno wrote:
> >>>> Il 14/01/26 10:00, Andy Shevchenko ha scritto:
> >>>>> On Wed, Jan 14, 2026 at 09:59:40AM +0100, AngeloGioacchino Del Regno wrote:
> >>>>>> Il 14/01/26 09:56, Andy Shevchenko ha scritto:
> >>>>>>> On Wed, Jan 14, 2026 at 09:39:52AM +0100, AngeloGioacchino Del Regno wrote:
...
> >>>>>>>> + struct regmap_config sdam_regmap_config = {
> >>>>>>>> + .reg_bits = 16,
> >>>>>>>> + .val_bits = 8,
> >>>>>>>
> >>>>>>>> + .max_register = 0x100,
> >>>>>>>
> >>>>>>> Are you sure? This might be a bad naming, but here max == the last accessible.
> >>>>>>> I bet it has to be 0xff (but since the address is 16-bit it might be actually
> >>>>>>> 257 registers, but sounds very weird).
> >>>>>>
> >>>>>> Yes, I'm sure.
> >>>>>
> >>>>> So, what is resided on address 0x100 ?
> >>>>
> >>>> I don't remember, this is research from around 5 months ago, when I've sent
> >>>> the v1 of this.
> >>>>
> >>>> If you really want though, I can incorrectly set max_register to 0xff.
> >>>
> >>> Why incorrectly? Can you dig into the datasheet and check, please? We don't
> >>> know what is the 0x100 address means.
> >>
> >> I don't have any datasheets for Qualcomm IPs.
> >
> > Hmm... Can we have somebody from QC to check on this?
> > Perhaps Dmitry?
>
> 0xe6 is the last usable register today
Thanks for checking!
> But I wouldn't mind either 0xff or 0x100 because I don't want
> anyone to pull their hair out if a regmap access is dropped some day..
There is actually about the exact window size where registers are belong to the
same entity (subdevice). As in the HW world most of the things are stuck with
power-of-two numbers, and taking into account the naming of the field, I do not
believe one provides a 257 (256 + 1 = 2⁸ + 1) register _windows_ ("s" is also
important here, as it points out to the pattern) for the subdevices. I bet the
0xff, i.e. 256, is the *correct* window from the HW perspective.
--
With Best Regards,
Andy Shevchenko
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