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Message-ID: <20260115123042.000015ad@huawei.com>
Date: Thu, 15 Jan 2026 12:30:42 +0000
From: Jonathan Cameron <jonathan.cameron@...wei.com>
To: Lorenzo Pieralisi <lpieralisi@...nel.org>
CC: "Rafael J. Wysocki" <rafael@...nel.org>, Len Brown <lenb@...nel.org>,
	Robert Moore <robert.moore@...el.com>, Hanjun Guo <guohanjun@...wei.com>,
	Sudeep Holla <sudeep.holla@....com>, Marc Zyngier <maz@...nel.org>, "Bjorn
 Helgaas" <bhelgaas@...gle.com>, Thomas Gleixner <tglx@...nel.org>,
	<linux-acpi@...r.kernel.org>, <acpica-devel@...ts.linux.dev>,
	<linux-kernel@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>,
	<linux-pci@...r.kernel.org>
Subject: Re: [PATCH v3 4/6] irqchip/gic-v5: Add ACPI IRS probing

On Thu, 15 Jan 2026 10:50:50 +0100
Lorenzo Pieralisi <lpieralisi@...nel.org> wrote:

> On ARM64 ACPI systems GICv5 IRSes are described in MADT sub-entries.
> 
> Add the required plumbing to parse MADT IRS firmware table entries and
> probe the IRS components in ACPI.
> 
> Augment the irqdomain_ops.translate() for PPI and SPI IRQs in order to
> provide support for their ACPI based firmware translation.
> 
> Implement an irqchip ACPI based callback to initialize the global GSI
> domain upon an MADT IRS detection.
> 
> The IRQCHIP_ACPI_DECLARE() entry in the top level GICv5 driver is only used
> to trigger the IRS probing (ie the global GSI domain is initialized once on
> the first call on multi-IRS systems); IRS probing takes place by calling
> acpi_table_parse_madt() in the IRS sub-driver, that probes all IRSes
> in sequence.
> 
> Add a new ACPI interrupt model so that it can be detected at runtime and
> distinguished from previous GIC architecture models.
> 
> Signed-off-by: Lorenzo Pieralisi <lpieralisi@...nel.org>
> Cc: Thomas Gleixner <tglx@...nel.org>
> Cc: "Rafael J. Wysocki" <rafael@...nel.org>
> Cc: Marc Zyngier <maz@...nel.org>
LGTM
Reviewed-by: Jonathan Cameron <jonathan.cameron@...wei.com>

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