linux-kernel - [PATCH v2 2/2] drm/bridge: waveshare-dsi: Add support for 1..4 DSI data lanes

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20260115024004.660986-2-marek.vasut+renesas@mailbox.org>
Date: Thu, 15 Jan 2026 03:39:43 +0100
From: Marek Vasut <marek.vasut+renesas@...lbox.org>
To: dri-devel@...ts.freedesktop.org
Cc: Marek Vasut <marek.vasut+renesas@...lbox.org>,
	Joseph Guo <qijian.guo@....com>,
	Andrzej Hajda <andrzej.hajda@...el.com>,
	Conor Dooley <conor+dt@...nel.org>,
	David Airlie <airlied@...il.com>,
	Jernej Skrabec <jernej.skrabec@...il.com>,
	Jonas Karlman <jonas@...boo.se>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Laurent Pinchart <Laurent.pinchart@...asonboard.com>,
	Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
	Maxime Ripard <mripard@...nel.org>,
	Neil Armstrong <neil.armstrong@...aro.org>,
	Rob Herring <robh@...nel.org>,
	Robert Foss <rfoss@...nel.org>,
	Simona Vetter <simona@...ll.ch>,
	Thomas Zimmermann <tzimmermann@...e.de>,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	linux-renesas-soc@...r.kernel.org
Subject: [PATCH v2 2/2] drm/bridge: waveshare-dsi: Add support for 1..4 DSI data lanes

Parse the data lane count out of DT. Limit the supported data lanes
to 1..4 which is the maximum available DSI pairs on the connector of
any known panels which may use this bridge. Internally, this bridge
is an ChipOne ICN6211 which loads its register configuration from a
dedicated storage and its I2C does not seem to be accessible. The
ICN6211 also supports up to 4 DSI lanes, so this is a hard limit.

To avoid any breakage on old DTs where the parsing of data lanes from
DT may fail, fall back to the original hard-coded value of 2 lanes and
warn user.

The lane configuration is preconfigured in the bridge for each of the
WaveShare panels. The 13.3" DSI panel works with 4-lane configuration,
others seem to use 2-lane configuration. This is a hardware property,
so the actual count should come from DT.

Reviewed-by: Joseph Guo <qijian.guo@....com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@...lbox.org>
---
Cc: Andrzej Hajda <andrzej.hajda@...el.com>
Cc: Conor Dooley <conor+dt@...nel.org>
Cc: David Airlie <airlied@...il.com>
Cc: Jernej Skrabec <jernej.skrabec@...il.com>
Cc: Jonas Karlman <jonas@...boo.se>
Cc: Joseph Guo <qijian.guo@....com>
Cc: Krzysztof Kozlowski <krzk+dt@...nel.org>
Cc: Laurent Pinchart <Laurent.pinchart@...asonboard.com>
Cc: Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>
Cc: Maxime Ripard <mripard@...nel.org>
Cc: Neil Armstrong <neil.armstrong@...aro.org>
Cc: Rob Herring <robh@...nel.org>
Cc: Robert Foss <rfoss@...nel.org>
Cc: Simona Vetter <simona@...ll.ch>
Cc: Thomas Zimmermann <tzimmermann@...e.de>
Cc: devicetree@...r.kernel.org
Cc: dri-devel@...ts.freedesktop.org
Cc: linux-kernel@...r.kernel.org
Cc: linux-renesas-soc@...r.kernel.org
---
V2: - Add RB from Joseph
    - Update the error print to "Invalid{ +or missing+}"
---
 drivers/gpu/drm/bridge/waveshare-dsi.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/bridge/waveshare-dsi.c b/drivers/gpu/drm/bridge/waveshare-dsi.c
index 9254446f54958..0497c7ecbc7a5 100644
--- a/drivers/gpu/drm/bridge/waveshare-dsi.c
+++ b/drivers/gpu/drm/bridge/waveshare-dsi.c
@@ -66,7 +66,12 @@ static int ws_bridge_attach_dsi(struct ws_bridge *ws)
 	dsi->mode_flags = MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_VIDEO |
 			  MIPI_DSI_CLOCK_NON_CONTINUOUS;
 	dsi->format = MIPI_DSI_FMT_RGB888;
-	dsi->lanes = 2;
+	dsi->lanes = drm_of_get_data_lanes_count_ep(dev->of_node, 0, 0, 1, 4);
+	if (dsi->lanes < 0) {
+		dev_warn(dev, "Invalid or missing DSI lane count %d, falling back to 2 lanes\n",
+			 dsi->lanes);
+		dsi->lanes = 2;	/* Old DT backward compatibility */
+	}
 
 	ret = devm_mipi_dsi_attach(dev, dsi);
 	if (ret < 0)
-- 
2.51.0