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Message-ID: <20260115-phonics-reversal-80541ca1f2df@spud>
Date: Thu, 15 Jan 2026 19:13:17 +0000
From: Conor Dooley <conor@...nel.org>
To: Guodong Xu <guodong@...cstar.com>
Cc: Jonathan Corbet <corbet@....net>, Paul Walmsley <pjw@...nel.org>,
	Palmer Dabbelt <palmer@...belt.com>,
	Albert Ou <aou@...s.berkeley.edu>, Alexandre Ghiti <alex@...ti.fr>,
	Conor Dooley <conor.dooley@...rochip.com>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Chen Wang <unicorn_wang@...look.com>,
	Inochi Amaoto <inochiama@...il.com>, Yixun Lan <dlan@...too.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Junhui Liu <junhui.liu@...moral.tech>, linux-doc@...r.kernel.org,
	linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
	devicetree@...r.kernel.org, sophgo@...ts.linux.dev,
	spacemit@...ts.linux.dev
Subject: Re: [PATCH v2 0/4] riscv: dts: Add "b" ISA extension to existing
 devicetrees

On Thu, Jan 15, 2026 at 07:18:56AM +0800, Guodong Xu wrote:
> The RISC-V "b" (Bit-manipulation) extension was ratified in April 2024,
> much later than its component extensions zba/zbb/zbs (June 2021). Recent
> updates to the device tree bindings [2] enforce that when all three
> component extensions are present, "b" must also be specified. Related
> discussion can also be found in [1].
> 
> Patch 1 clarifies the ISA spec version for canonical ordering in uabi.rst.
> It is a trivial update, but can help readers reference the correct
> document version. Acked-by Paul Walmsley in v1.
> 
> Patch 2, 3 and 4 adds "b" after "c" in 3 different device tree files
> respectivly, anlogic, sophgo and spacemit, fixing the related dtbs_check
> warnings.
> 
> This patchset is based on top of linux-next, tag: next-20260109, and
> depends on [2].
> 
> Link: https://lore.kernel.org/all/20251230-imprison-sleet-6b5a1e26d34b@spud/ [1]
> Link: https://lore.kernel.org/all/20260110-k3-basic-dt-v4-0-d492f3a30ffa@riscstar.com/ [2]
> 
> Changes in v2:
> - Patch 1: Add Acked-by from Paul Walmsley.
> - Patch 2/3/4: These are splits from the v1 Patch 2. Split into three
>     different patches for each SoC.
> - Link to v1: https://lore.kernel.org/r/20260113-adding-b-dtsi-v1-0-22d6e55d19df@riscstar.com
> 
> Signed-off-by: Guodong Xu <guodong@...cstar.com>
> ---
> Guodong Xu (4):
>       Documentation: riscv: uabi: Clarify ISA spec version for canonical order
>       riscv: dts: anlogic: dr1v90: Add "b" ISA extension
>       riscv: dts: sophgo: sg2044: Add "b" ISA extension
>       riscv: dts: spacemit: k1: Add "b" ISA extension
> 
>  Documentation/arch/riscv/uabi.rst           |   4 +-
>  arch/riscv/boot/dts/anlogic/dr1v90.dtsi     |   5 +-
>  arch/riscv/boot/dts/sophgo/sg2044-cpus.dtsi | 256 ++++++++++++++--------------
>  arch/riscv/boot/dts/spacemit/k1.dtsi        |  32 ++--
>  4 files changed, 150 insertions(+), 147 deletions(-)
> ---
> base-commit: 31d167f54de93f14fa8e4bc6cbc4adaf7019fd94
> change-id: 20260113-adding-b-dtsi-148714533f07
> prerequisite-message-id: <20260110-k3-basic-dt-v4-0-d492f3a30ffa@...cstar.com>
> prerequisite-patch-id: 0c859b4d131b3360875c795c6148c6176b55fb91
> prerequisite-patch-id: 2ed98dc1ab0f5ed923cc252415c345dc8caf6f17
> prerequisite-patch-id: 1be1a031763fac029076a768f012af31e455be66
> prerequisite-patch-id: 21bb8387c946e050910440e7a7622305d46d946d
> prerequisite-patch-id: f3bdc2c74b230663710086bd770a755d56cb8b9c
> prerequisite-patch-id: 1f162c02f8bdb5bbc8ce52ead4fcb76258f5c2b9
> prerequisite-patch-id: 76e1ff26c2f1fe4019cfa574942b568000e6ca1f
> prerequisite-patch-id: 77ddc9e5dc85495adc803cdc605bdda2ddc7fa47
> prerequisite-patch-id: a75c798383b46a14d40436357c769c3671184768
> prerequisite-patch-id: 781fc10dcae2c38c84c25bee887ef7474786dd36
> prerequisite-patch-id: 5be5d3e62aa73024bf9e1de6aad155be6d618f40

FWIW, this kind of prereq-patch-id stuff isn't really helpful, because I
don't think there's actually any dependencies on that work. It actually
trips up some parts of b4 that think they're needed.

I applied the Anlogic patch.

Thanks,
Conor.

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