Message-Id: <449C35F3-CFA1-4B1B-A65D-A3C259E70DF7@collabora.com>
Date: Wed, 14 Jan 2026 21:12:17 -0300
From: Daniel Almeida <daniel.almeida@...labora.com>
To: Danilo Krummrich <dakr@...nel.org>
Cc: Lyude Paul <lyude@...hat.com>,
 dri-devel@...ts.freedesktop.org,
 rust-for-linux@...r.kernel.org,
 Alice Ryhl <aliceryhl@...gle.com>,
 linux-kernel@...r.kernel.org,
 Miguel Ojeda <ojeda@...nel.org>,
 Alex Gaynor <alex.gaynor@...il.com>,
 Boqun Feng <boqun.feng@...il.com>,
 Gary Guo <gary@...yguo.net>,
 Björn Roy Baron <bjorn3_gh@...tonmail.com>,
 Benno Lossin <lossin@...nel.org>,
 Andreas Hindborg <a.hindborg@...nel.org>,
 Trevor Gross <tmgross@...ch.edu>,
 Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
 Viresh Kumar <viresh.kumar@...aro.org>,
 FUJITA Tomonori <fujita.tomonori@...il.com>,
 Krishna Ketan Rai <prafulrai522@...il.com>,
 Tamir Duberstein <tamird@...il.com>,
 Xiangfei Ding <dingxiangfei2009@...il.com>,
 Zhi Wang <zhiw@...dia.com>,
 Matthew Maurer <mmaurer@...gle.com>,
 Alexandre Courbot <acourbot@...dia.com>
Subject: Re: [PATCH v6 7/8] rust: Introduce iosys_map bindings



> On 14 Jan 2026, at 20:21, Danilo Krummrich <dakr@...nel.org> wrote:
> 
> (Cc: Zhi, Matt, Alex)
> 
> On Tue Dec 2, 2025 at 11:03 PM CET, Lyude Paul wrote:
>> This introduces a set of bindings for working with iosys_map in rust code.
>> The design of this is heavily based off the design for both the io and
>> dma_map bindings for Rust.
> 
> I already had a chat with Lyude about this, but also want to post it here. I
> have mainly two comment on this:
> 
>  (1) The backing memory of iosys_map may be a device resource and hence has to
>      be protected against (bus) device / driver unbind.
> 
>  (2) The idea for the generic I/O infrastructure is to support arbitrary I/O
>      backends rather than only MMIO. For instance, this can also be PCI
>      configuration space, I2C, SPI, etc., but also DMA, VRAM, system memory,
>      etc.
> 
>      For this, there is a patch series from Zhi [1] splitting up the current
>      I/O structures into traits that we will land soon.
> 
>      We will also have macros analogous to dma_read!() and dma_write!() for the
>      generic I/O infrastructure, which Matt also works on for his QC SoC
>      driver.
> 
>      This will allow us to unify all kinds of I/O operations into a single
>      interface, supporting the read!() and write!() accessors for values, the
>      register!() macro and raw accessors, such as e.g. read32().
> 
>      With this we will have something that is way more powerful than iosys_map
>      and makes this abstraction obsolete.
> 
> So instead of introducing an abstraction for iosys_map we should just implement
> the corresponding I/O backends based on [1].
> 
> [1] https://lore.kernel.org/all/20260113092253.220346-3-zhiw@nvidia.com/
> 

I wonder if we can combine this with the idea of splitting I/O ranges that
we have been discussing for a while. It is a simple concept: you might have a
mapping that covers a given length (say, a single BO), but this mapping might
be split into multiple subregions that are not accessed simultaneously. This
allows for finer-grain control, as subregions are isolated from each other.

If the idea is to have all these types eventually dereference to “Io”
or something like this, the above may be as simple as adding a
“split()” method which generates a second Io while simultaneously
adjusting the bounds as needed.

If this is a good idea then I can spend cycles, as I’ll have a use for that in Tyr.

— Daniel

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