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Message-Id: <20260115-k3-basic-dt-v5-0-6990ac9f4308@riscstar.com>
Date: Thu, 15 Jan 2026 14:51:39 +0800
From: Guodong Xu <guodong@...cstar.com>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Paul Walmsley <pjw@...nel.org>,
Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>,
Alexandre Ghiti <alex@...ti.fr>, Yixun Lan <dlan@...too.org>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Samuel Holland <samuel.holland@...ive.com>,
Anup Patel <anup@...infault.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Jiri Slaby <jirislaby@...nel.org>, Lubomir Rintel <lkundrak@...sk>,
Yangyu Chen <cyy@...self.name>, Thomas Gleixner <tglx@...nel.org>,
Thomas Gleixner <tglx@...nel.org>
Cc: Paul Walmsley <paul.walmsley@...ive.com>,
Conor Dooley <conor@...nel.org>, Heinrich Schuchardt <xypron.glpk@....de>,
Kevin Meng Zhang <zhangmeng.kevin@...ux.spacemit.com>,
Anup Patel <anup@...infault.org>, Andrew Jones <ajones@...tanamicro.com>,
devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org, spacemit@...ts.linux.dev,
linux-serial@...r.kernel.org, Guodong Xu <guodong@...cstar.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@....qualcomm.com>,
Heinrich Schuchardt <heinrich.schuchardt@...onical.com>,
Conor Dooley <conor.dooley@...rochip.com>
Subject: [PATCH v5 0/7] riscv: spacemit: Add SpacemiT K3 SoC and K3
Pico-ITX board
This series introduces basic support for the SpacemiT K3 SoC and the
K3 Pico-ITX evaluation board.
In v5, patches 6-9 (dt-bindings) have been dropped as they were accepted
by Conor and applied to riscv-dt-for-next.
The series has been rebased on linux-next tag: next-20260114.
The SpacemiT K3 is an SoC featuring 8 SpacemiT X100 RISC-V cores.
The X100 is a 4-issue, out-of-order core compliant with the RVA23
profile, targeting high-performance scenarios. [1]
The K3 Pico-ITX is an evaluation board built around the K3 SoC.
>From an RVA23 profile compliance perspective, the X100 supports all
mandatory extensions required by RVA23U64 and RVA23S64.
Link: https://www.spacemit.com/en/spacemit-x100-core/ [1]
Changes in v5:
- Patch 1:
Add Acked-by from Paul.
- Patch 5:
Add Reviewed-by from Yixun, add Acked-by from Conor.
- Patch 6 (Patch 10 in v4):
Update the copyright year to 2026.
Update the commit message.
Set M-mode maplic and mimsic status to "reserved".
In maplic node, use riscv,delegation to match kernel binding. OpenSBI
accepts both delegate and delgation, but the binding documents only
riscv,delegation.
- Patch 7 (Patch 11 in v4):
Update the commit message subject line.
Remove the unused aliases.
Update the copyright year to 2026.
- Link to v4: https://lore.kernel.org/r/20260110-k3-basic-dt-v4-0-d492f3a30ffa@riscstar.com
Changes in v4:
- Patch 5:
Adjust maintainers list in alphabetic order.
Declare spacemit,k3-pico-itx as an enum, which could save future
code change when adding new boards.
- Patch 10:
Fix missing blank space after comma in simsic compatible.
Add m-mode imsic and aplic nodes, per suggestion received from Samuel
Holland.
Adjust node properties order in nodes simsic, saplic, mimsic, maplic to
follow the DTS coding style.
- Link to v3: https://lore.kernel.org/r/20260108-k3-basic-dt-v3-0-ed99eb4c3ad3@riscstar.com
Other Changes in v3 include:
- Patch 1:
Acked-by: Krzysztof Kozlowski
- Patch 4:
Acked-by: Krzysztof Kozlowski
- Dropped Patch 5 "dt-bindings: serial: 8250: add SpacemiT K3 UART compatible"
as it has been applied to tty-next.
- Link to v2: https://lore.kernel.org/r/20251222-k3-basic-dt-v2-0-3af3f3cd0f8a@riscstar.com
Changes in v2:
- Patch 1:
Fixed alphanumeric sorting order of compatible strings (swapped x100 and
x60) as per Krzysztof's feedback.
Update commit message with more information about X100 featurs per
Yixun's feedback.
- Patch 4:
Fixed the order to keep things alphabetically.
- Patch 6:
Use "one blank space" between name and email address.
- Patch 7 ~ 11:
New patches. Add description of RVA23 mandatory extensions into riscv
binding YAML file.
- Patch 12 (Patch 7 in v1):
Removed aliases node.
Updated 'riscv,isa-extensions' with new extension strings available
- Patch 13 (Patch 8 in v1):
Updated the memory address to the hardware truth.
Added aliases node in board dts.
- Patch 1,2,3,5: Add Reviewed-by and Acked-by collected.
Link to v1: https://lore.kernel.org/r/20251216-k3-basic-dt-v1-0-a0d256c9dc92@riscstar.com
Signed-off-by: Guodong Xu <guodong@...cstar.com>
---
Guodong Xu (7):
dt-bindings: riscv: add SpacemiT X100 CPU compatible
dt-bindings: timer: add SpacemiT K3 CLINT
dt-bindings: interrupt-controller: add SpacemiT K3 APLIC
dt-bindings: interrupt-controller: add SpacemiT K3 IMSIC
dt-bindings: riscv: spacemit: add K3 and Pico-ITX board bindings
riscv: dts: spacemit: add initial support for K3 SoC
riscv: dts: spacemit: add K3 Pico-ITX board support
.../bindings/interrupt-controller/riscv,aplic.yaml | 1 +
.../interrupt-controller/riscv,imsics.yaml | 1 +
Documentation/devicetree/bindings/riscv/cpus.yaml | 1 +
.../devicetree/bindings/riscv/spacemit.yaml | 5 +
.../devicetree/bindings/timer/sifive,clint.yaml | 1 +
arch/riscv/boot/dts/spacemit/Makefile | 1 +
arch/riscv/boot/dts/spacemit/k3-pico-itx.dts | 29 +
arch/riscv/boot/dts/spacemit/k3.dtsi | 590 +++++++++++++++++++++
8 files changed, 629 insertions(+)
---
base-commit: 78ffa9bb137071c00eec2d4afc247ef92d5c0b90
change-id: 20251216-k3-basic-dt-cd9540061989
Best regards,
--
Guodong Xu <guodong@...cstar.com>
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