linux-kernel - Re: [PATCH v2 2/2] arm64: dts: qcom: kodiak: enable the inline crypto engine for SDHC

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Message-ID: <20260115-versatile-bustard-of-bliss-059e5a@quoll>
Date: Thu, 15 Jan 2026 10:05:06 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Neeraj Soni <neeraj.soni@....qualcomm.com>
Cc: ulf.hansson@...aro.org, robh@...nel.org, krzk+dt@...nel.org, 
	conor+dt@...nel.org, andersson@...nel.org, konradybcio@...nel.org, 
	linux-mmc@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 2/2] arm64: dts: qcom: kodiak: enable the inline
 crypto engine for SDHC

On Wed, Jan 14, 2026 at 03:18:48PM +0530, Neeraj Soni wrote:
> Add an ICE node to kodiak SoC description and enable it by adding a
> phandle to the SDHC node.
> 
> Signed-off-by: Neeraj Soni <neeraj.soni@....qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/kodiak.dtsi | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qcom/kodiak.dtsi
> index c2ccbb67f800..fb2a9c0ea0f5 100644
> --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi
> +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi
> @@ -1045,6 +1045,8 @@ sdhc_1: mmc@...000 {
>  			qcom,dll-config = <0x0007642c>;
>  			qcom,ddr-config = <0x80040868>;
>  
> +			qcom,ice = <&sdhc_ice>;
> +
>  			mmc-ddr-1_8v;
>  			mmc-hs200-1_8v;
>  			mmc-hs400-1_8v;
> @@ -1071,6 +1073,13 @@ opp-384000000 {
>  			};
>  		};
>  
> +		sdhc_ice: crypto@...000 {

Why this became uppercase?

> +			compatible = "qcom,sc7280-inline-crypto-engine",
> +				     "qcom,inline-crypto-engine";
> +			reg = <0x0 0x007C8000 0x0 0x18000>;

And this? there is no uppercase at all, so maybye you copied it from
downstream, but that's not right approach - do not use downstream code.

Best regards,
Krzysztof