From d4da610f7104f254e7dc5f9d7f6aa1b112fda287 Mon Sep 17 00:00:00 2001 From: Gokul Praveen Date: Thu, 15 Jan 2026 14:52:59 +0530 Subject: [PATCH] Enable EHRPWM 1_B using AC33 pin Enable PWM EVENT TRACING --- .../boot/dts/ti/k3-j784s4-j742s2-common.dtsi | 1 + .../dts/ti/k3-j784s4-j742s2-evm-common.dtsi | 18 ++++++++++++++++-- arch/arm64/configs/defconfig | 7 ++++++- 3 files changed, 23 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-common.dtsi index 1dceff119a47..af4103f159e3 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-common.dtsi @@ -103,6 +103,7 @@ cbass_main: bus@100000 { <0x44 0x00000000 0x44 0x00000000 0x00 0x08000000>, /* PCIe2 DAT0 */ <0x44 0x10000000 0x44 0x10000000 0x00 0x08000000>, /* PCIe3 DAT0 */ <0x4e 0x20000000 0x4e 0x20000000 0x00 0x00080000>, /* GPU */ + <0x00 0x03010000 0x00 0x03010000 0x00 0x00000100>, /*EHRPWM1*/ /* MCUSS_WKUP Range */ <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>, diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi index e50735577737..4a63ddeaa372 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi @@ -296,6 +296,13 @@ J784S4_IOPAD(0x0e8, PIN_INPUT, 8) /* (AR38) TIMER_IO0.MMC1_SDCD */ >; }; + main_ehrpwm1_pins_default: main-ehrpwm1-pins-default { + bootph-all; + pinctrl-single,pins = < + J784S4_IOPAD(0x074, PIN_OUTPUT, 9) /* (AC33) EHRPWM1_B.GPIO0_29 */ + >; + }; + vdd_sd_dv_pins_default: vdd-sd-dv-default-pins { pinctrl-single,pins = < J784S4_IOPAD(0x020, PIN_INPUT, 7) /* (AJ35) MCAN15_RX.GPIO0_8 */ @@ -661,6 +668,13 @@ &mcu_uart0 { pinctrl-0 = <&mcu_uart0_pins_default>; }; +&main_ehrpwm1 { + /* EHRPWM1*/ + pinctrl-names = "default"; + pinctrl-0 = <&main_ehrpwm1_pins_default>; + status = "okay"; +}; + &main_uart8 { bootph-all; status = "okay"; @@ -852,7 +866,7 @@ p15-hog { /* P15 - CANUART_MUX1_SEL1 */ gpio-hog; gpios = <15 GPIO_ACTIVE_HIGH>; - output-high; + output-low; line-name = "CANUART_MUX1_SEL1"; }; }; @@ -888,7 +902,7 @@ &main_sdhci0 { &main_sdhci1 { bootph-all; /* SD card */ - status = "okay"; + status = "disabled"; pinctrl-0 = <&main_mmc1_pins_default>; pinctrl-names = "default"; disable-wp; diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 45288ec9eaf7..d08d9346e848 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1643,7 +1643,7 @@ CONFIG_PWM_STM32=m CONFIG_PWM_SUN4I=m CONFIG_PWM_TEGRA=m CONFIG_PWM_TIECAP=m -CONFIG_PWM_TIEHRPWM=m +CONFIG_PWM_TIEHRPWM=y CONFIG_PWM_VISCONTI=m CONFIG_SL28CPLD_INTC=y CONFIG_QCOM_PDC=y @@ -1859,6 +1859,10 @@ CONFIG_DEBUG_FS=y # CONFIG_SCHED_DEBUG is not set # CONFIG_DEBUG_PREEMPT is not set # CONFIG_FTRACE is not set +CONFIG_FTRACE=y +CONFIG_TRACING=y +CONFIG_EVENT_TRACING=y +CONFIG_TRACING_SUPPORT=y CONFIG_CORESIGHT=m CONFIG_CORESIGHT_LINK_AND_SINK_TMC=m CONFIG_CORESIGHT_CATU=m @@ -1868,3 +1872,4 @@ CONFIG_CORESIGHT_STM=m CONFIG_CORESIGHT_CPU_DEBUG=m CONFIG_CORESIGHT_CTI=m CONFIG_MEMTEST=y + -- 2.34.1