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Message-ID: <aWoyh0e2ncSsNW9y@orome>
Date: Fri, 16 Jan 2026 13:44:02 +0100
From: Thierry Reding <thierry.reding@...il.com>
To: Ashish Mhetre <amhetre@...dia.com>
Cc: will@...nel.org, robin.murphy@....com, joro@...tes.org,
robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org, nicolinc@...dia.com,
jonathanh@...dia.com, vdumpa@...dia.com, jgg@...pe.ca,
linux-arm-kernel@...ts.infradead.org, iommu@...ts.linux.dev, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-tegra@...r.kernel.org
Subject: Re: [PATCH V8 3/4] dt-bindings: iommu: Add NVIDIA Tegra CMDQV support
On Tue, Jan 13, 2026 at 05:49:34AM +0000, Ashish Mhetre wrote:
> The Command Queue Virtualization (CMDQV) hardware is part of the
> SMMUv3 implementation on NVIDIA Tegra SoCs. It assists in
> virtualizing the command queue for the SMMU.
>
> Add a new device tree binding document for nvidia,tegra264-cmdqv.
>
> Also update the arm,smmu-v3 binding to include an optional nvidia,cmdqv
> property. This property is a phandle to the CMDQV device node, allowing
> the SMMU driver to associate with its corresponding CMDQV instance.
> Restrict this property usage to Nvidia Tegra264 only.
>
> Reviewed-by: Rob Herring (Arm) <robh@...nel.org>
> Acked-by: Nicolin Chen <nicolinc@...dia.com>
> Signed-off-by: Ashish Mhetre <amhetre@...dia.com>
> ---
> .../bindings/iommu/arm,smmu-v3.yaml | 27 +++++++++++-
> .../bindings/iommu/nvidia,tegra264-cmdqv.yaml | 42 +++++++++++++++++++
> 2 files changed, 68 insertions(+), 1 deletion(-)
> create mode 100644 Documentation/devicetree/bindings/iommu/nvidia,tegra264-cmdqv.yaml
Applied, thanks.
Thierry
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