linux-kernel - [PATCH 0/3] riscv: cpufeature: Add Supm extension id and validation

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Message-Id: <20260116-supm-ext-id-v1-0-5fcf778ba4a6@riscstar.com>
Date: Fri, 16 Jan 2026 10:10:30 +0800
From: Guodong Xu <guodong@...cstar.com>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, 
 Samuel Holland <samuel.holland@...ive.com>, 
 Heinrich Schuchardt <heinrich.schuchardt@...onical.com>, 
 Paul Walmsley <pjw@...nel.org>, Palmer Dabbelt <palmer@...belt.com>, 
 Albert Ou <aou@...s.berkeley.edu>, Alexandre Ghiti <alex@...ti.fr>, 
 Evan Green <evan@...osinc.com>, Andrew Jones <ajones@...tanamicro.com>
Cc: Paul Walmsley <paul.walmsley@...ive.com>, 
 Conor Dooley <conor@...nel.org>, devicetree@...r.kernel.org, 
 linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org, 
 Guodong Xu <guodong@...cstar.com>
Subject: [PATCH 0/3] riscv: cpufeature: Add Supm extension id and
 validation

Supm as an extension indicates pointer-masking support for user mode
(U-mode). It relies on Ssnpm or Smnpm for the underlying hardware
implementation.

As a ratified feature, define a dedicated RISCV_ISA_EXT_ id for Supm.
However, since Supm is targeting U-mode, it should not be added into
devicetrees that describe hardware running privileged system softwares.

Supm is implied by Ssnpm (S-mode) or Smnpm (M-mode). Add parsing logic
and validation to ensure this dependency.

When CONFIG_RISCV_ISA_SUPM is disabled, Supm validation will fail
regardless of whether Ssnpm or Smnpm exist. This patchset doesn't change
this behavior.

Prior discussions about how Supm should be handled can be found in Links
[1] and [2].

Link: https://lore.kernel.org/lkml/20260101-legume-engraved-0fae8282cfbe@spud/#r [1]
Link: https://lore.kernel.org/all/4ebbe14b-2579-4ba6-808d-d50c24641d04@sifive.com/#r [2]

Signed-off-by: Guodong Xu <guodong@...cstar.com>
---
Guodong Xu (3):
      dt-bindings: riscv: Add Supm extension description
      riscv: cpufeature: Add ISA extension parsing for Supm
      riscv: cpufeature: Clarify ISA spec version for canonical order

 .../devicetree/bindings/riscv/extensions.yaml      | 17 ++++++++++
 arch/riscv/include/asm/hwcap.h                     |  3 +-
 arch/riscv/kernel/cpufeature.c                     | 38 ++++++++++++++++++++--
 3 files changed, 53 insertions(+), 5 deletions(-)
---
base-commit: ef41e6187f77b52e4b17ab9637be8f878e1f7a5b
change-id: 20260116-supm-ext-id-826e8da4c4b5

Best regards,
-- 
Guodong Xu <guodong@...cstar.com>