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Message-ID: <20260116033450.965-3-ravi.bangoria@amd.com>
Date: Fri, 16 Jan 2026 03:34:41 +0000
From: Ravi Bangoria <ravi.bangoria@....com>
To: Peter Zijlstra <peterz@...radead.org>, Ingo Molnar <mingo@...hat.com>
CC: Ravi Bangoria <ravi.bangoria@....com>, Arnaldo Carvalho de Melo
<acme@...nel.org>, Namhyung Kim <namhyung@...nel.org>, Ian Rogers
<irogers@...gle.com>, Dapeng Mi <dapeng1.mi@...ux.intel.com>, James Clark
<james.clark@...aro.org>, <x86@...nel.org>,
<linux-perf-users@...r.kernel.org>, <linux-kernel@...r.kernel.org>, "Manali
Shukla" <manali.shukla@....com>, Santosh Shukla <santosh.shukla@....com>,
Ananth Narayan <ananth.narayan@....com>, Sandipan Das <sandipan.das@....com>
Subject: [PATCH 02/11] perf/amd/ibs: Limit ldlat->l3missonly dependency to Zen5
The ldlat dependency on l3missonly is specific to Zen 5; newer generations
are not affected. This quirk is documented as an erratum in the following
Revision Guide.
Erratum: 1606 IBS (Instruction Based Sampling) OP Load Latency Filtering
May Capture Unwanted Samples When L3Miss Filtering is Disabled
Revision Guide for AMD Family 1Ah Models 00h-0Fh Processors,
Pub. 58251 Rev. 1.30 July 2025
https://bugzilla.kernel.org/attachment.cgi?id=309193
Signed-off-by: Ravi Bangoria <ravi.bangoria@....com>
---
arch/x86/events/amd/ibs.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
index 96bb0974057f..dc8cc173cdf5 100644
--- a/arch/x86/events/amd/ibs.c
+++ b/arch/x86/events/amd/ibs.c
@@ -356,7 +356,10 @@ static int perf_ibs_init(struct perf_event *event)
ldlat >>= 7;
config |= (ldlat - 1) << 59;
- config |= IBS_OP_L3MISSONLY | IBS_OP_LDLAT_EN;
+
+ config |= IBS_OP_LDLAT_EN;
+ if (cpu_feature_enabled(X86_FEATURE_ZEN5))
+ config |= IBS_OP_L3MISSONLY;
}
/*
--
2.43.0
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