linux-kernel - Re: [PATCH 2/8] soc: tenstorrent: Add header with Atlantis syscon register offsets

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20260116-debonair-tangible-reindeer-debcee@quoll>
Date: Fri, 16 Jan 2026 10:06:10 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Anirudh Srinivasan <asrinivasan@....tenstorrent.com>
Cc: Drew Fustini <dfustini@....tenstorrent.com>, 
	Joel Stanley <jms@....tenstorrent.com>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, 
	Philipp Zabel <p.zabel@...gutronix.de>, linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org, joel@....id.au, fustini@...nel.org, 
	mpe@...nel.org, mpe@....tenstorrent.com, npiggin@....tenstorrent.com, 
	agross@...nel.org, agross@....tenstorrent.com
Subject: Re: [PATCH 2/8] soc: tenstorrent: Add header with Atlantis syscon
 register offsets

On Thu, Jan 15, 2026 at 05:42:01PM -0600, Anirudh Srinivasan wrote:
> Document register offsets used for controlling clocks in Atlantis
> 
> Signed-off-by: Anirudh Srinivasan <asrinivasan@....tenstorrent.com>
> ---
>  MAINTAINERS                               |  1 +
>  include/soc/tenstorrent/atlantis-syscon.h | 38 +++++++++++++++++++++++++++++++
>  2 files changed, 39 insertions(+)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 19a98b1fa456..4a2017d647b0 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -22538,6 +22538,7 @@ F:	Documentation/devicetree/bindings/riscv/tenstorrent.yaml
>  F:	Documentation/devicetree/bindings/soc/tenstorrent/tenstorrent,atlantis-syscon.yaml
>  F:	arch/riscv/boot/dts/tenstorrent/
>  F:	include/dt-bindings/clock/tenstorrent,atlantis-syscon.h
> +F:	include/soc/tenstorrent/
>  
>  RISC-V THEAD SoC SUPPORT
>  M:	Drew Fustini <fustini@...nel.org>
> diff --git a/include/soc/tenstorrent/atlantis-syscon.h b/include/soc/tenstorrent/atlantis-syscon.h
> new file mode 100644
> index 000000000000..b15dabfb42b5
> --- /dev/null
> +++ b/include/soc/tenstorrent/atlantis-syscon.h

There is no user of this. Split your work in logical patches. Adding
unused header is not a meaningful logical split because it is unused.

> @@ -0,0 +1,38 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Copyright (c) 2026 Tenstorrent
> + */
> +#ifndef __SOC_ATLANTIS_SYSCON_H__
> +#define __SOC_ATLANTIS_SYSCON_H__
> +
> +#include <linux/bits.h>
> +#include <linux/types.h>
> +
> +/* RCPU Clock Register Offsets */
> +#define RCPU_PLL_CFG_REG 0x0000
> +#define RCPU_NOCC_PLL_CFG_REG 0x0004
> +#define RCPU_NOCC_CLK_CFG_REG 0x0008
> +#define RCPU_DIV_CFG_REG 0x000C
> +#define RCPU_BLK_CG_REG 0x0014
> +#define LSIO_BLK_CG_REG 0x0018
> +#define PLL_RCPU_EN_REG 0x11c
> +#define PLL_NOCC_EN_REG 0x120
> +#define BUS_CG_REG 0x01FC

Completely unreadable: missing any sort of reasonable indent between
values.

Why do you need to doicument register values and provide them to all
kernel drivers?

Best regards,
Krzysztof