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Message-ID: <CAP-5=fV0iPapwbKX-rjbF86_WcZPji8opKNgO=r_kDSJB7T8XA@mail.gmail.com>
Date: Fri, 16 Jan 2026 21:50:24 -0800
From: Ian Rogers <irogers@...gle.com>
To: "Mi, Dapeng" <dapeng1.mi@...ux.intel.com>
Cc: Peter Zijlstra <peterz@...radead.org>, Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>, Namhyung Kim <namhyung@...nel.org>,
Thomas Gleixner <tglx@...utronix.de>, Dave Hansen <dave.hansen@...ux.intel.com>,
Adrian Hunter <adrian.hunter@...el.com>, Jiri Olsa <jolsa@...nel.org>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>, Andi Kleen <ak@...ux.intel.com>,
Eranian Stephane <eranian@...gle.com>, Mark Rutland <mark.rutland@....com>, broonie@...nel.org,
Ravi Bangoria <ravi.bangoria@....com>, linux-kernel@...r.kernel.org,
linux-perf-users@...r.kernel.org, Zide Chen <zide.chen@...el.com>,
Falcon Thomas <thomas.falcon@...el.com>, Dapeng Mi <dapeng1.mi@...el.com>,
Xudong Hao <xudong.hao@...el.com>, Kan Liang <kan.liang@...ux.intel.com>
Subject: Re: [Patch v5 18/19] perf parse-regs: Support new SIMD sampling format
On Mon, Jan 5, 2026 at 11:27 PM Mi, Dapeng <dapeng1.mi@...ux.intel.com> wrote:
> Ian,
>
> I looked at these perf regs __weak helpers again, like
> arch__intr_reg_mask()/arch__user_reg_mask(). It could be really hard to
> eliminate these __weak helpers and convert them into a generic function
> like perf_reg_name(). All these __weak helpers are arch-dependent and
> usually need to call perf_event_open sysctrl to get the required registers
> mask. So even we convert them into a generic function, we still have no way
> to get the registers mask of a different arch, like get x86 registers mask
> on arm machine. Another reason is that these __weak helpers may contain
> some arch-specific instructions. If we want to convert them into a general
> perf function like perf_reg_name(). It may cause building error since these
> arch-specific instructions may not exist on the building machine.
Hi Dapeng,
There was already a patch to better support cross architecture
libdw-unwind-ing and I've just sent out a series to clean this up so
that this is achieved by having mapping functions between perf and
dwarf register names. The functions use the e_machine of the binary to
determine how to map, etc. The series is here:
https://lore.kernel.org/lkml/20260117052849.2205545-1-irogers@google.com/
and I think it can be the foundation for avoiding the weak functions.
I also noticed that I think we're sampling the XMM registers for dwarf
unwinding, but it seems unlikely the XMM registers will hold stack
frame information - so this is probably an x86 inefficiency.
Thanks,
Ian
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