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Message-ID: <20260117-efficient-fractal-sloth-aaf7c2@quoll>
Date: Sat, 17 Jan 2026 12:46:53 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Luca Weiss <luca.weiss@...rphone.com>
Cc: Georgi Djakov <djakov@...nel.org>,
Bjorn Andersson <andersson@...nel.org>, Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, ~postmarketos/upstreaming@...ts.sr.ht,
phone-devel@...r.kernel.org, linux-pm@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH 2/5] dt-bindings: clock: qcom,milos-camcc: Document
interconnect path
On Fri, Jan 16, 2026 at 02:17:21PM +0100, Luca Weiss wrote:
> Document an interconnect path for camcc that's required to enable
> the CAMSS_TOP_GDSC power domain.
I find it confusing. Enabling GDSC power domains is done via power
domains, not via interconnects. Do not represent power domains as
interconnects, it's something completely different.
>
> Signed-off-by: Luca Weiss <luca.weiss@...rphone.com>
> ---
> Documentation/devicetree/bindings/clock/qcom,milos-camcc.yaml | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/clock/qcom,milos-camcc.yaml b/Documentation/devicetree/bindings/clock/qcom,milos-camcc.yaml
> index f63149ecf3e1..707b25d2c11e 100644
> --- a/Documentation/devicetree/bindings/clock/qcom,milos-camcc.yaml
> +++ b/Documentation/devicetree/bindings/clock/qcom,milos-camcc.yaml
> @@ -25,6 +25,10 @@ properties:
> - description: Sleep clock source
> - description: Camera AHB clock from GCC
>
> + interconnects:
> + items:
> + - description: Interconnect path to enable the MultiMedia NoC
And since when clock controllers are part of interconnect path... Even
more questions....
Best regards,
Krzysztof
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