[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20260119135907.GA2732125@e132581.arm.com>
Date: Mon, 19 Jan 2026 13:59:07 +0000
From: Leo Yan <leo.yan@....com>
To: Adrian Hunter <adrian.hunter@...el.com>
Cc: James Clark <james.clark@...aro.org>,
Suzuki K Poulose <suzuki.poulose@....com>,
Mike Leach <mike.leach@...aro.org>,
John Garry <john.g.garry@...cle.com>, Will Deacon <will@...nel.org>,
Leo Yan <leo.yan@...ux.dev>, Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Namhyung Kim <namhyung@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...nel.org>, Ian Rogers <irogers@...gle.com>,
Thomas Falcon <thomas.falcon@...el.com>, coresight@...ts.linaro.org,
linux-arm-kernel@...ts.infradead.org,
linux-perf-users@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/2] perf cs-etm: Fix decoding for sparse CPU maps
On Mon, Jan 19, 2026 at 02:11:43PM +0200, Adrian Hunter wrote:
[...]
> >> 0 0 0x200 [0x90]: PERF_RECORD_ID_INDEX nr: 4
> >> ... id: 771 idx: 0 cpu: 2 tid: -1
> >> ... id: 772 idx: 1 cpu: 3 tid: -1
> >> ... id: 773 idx: 0 cpu: 2 tid: -1
> >> ... id: 774 idx: 1 cpu: 3 tid: -1
> >
> > Seems to me that this patch works around the issue by using the CPU ID
> > instead, but event->auxtrace.idx is broken.
> >
> > Should we store the correct index in event->auxtrace.idx (e.g., in the
> > __perf_event__synthesize_id_index()) ?
>
> The idx value represents a perf events ring buffer. Events on the same
> CPU can share the same ring buffer. But in the case of per-thread
> recording, different threads have different ring buffers and therefore
> different idx values.
>
> So I don't think the idx value is wrong. It is just not the same thing
> as CPU number.
Thanks a lot for the explanation, this makes sense to me.
Leo
Powered by blists - more mailing lists