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Message-ID: <20260119180026.GN1134360@nvidia.com>
Date: Mon, 19 Jan 2026 14:00:26 -0400
From: Jason Gunthorpe <jgg@...dia.com>
To: Nicolin Chen <nicolinc@...dia.com>
Cc: will@...nel.org, robin.murphy@....com, bhelgaas@...gle.com,
joro@...tes.org, praan@...gle.com, baolu.lu@...ux.intel.com,
kevin.tian@...el.com, miko.lenczewski@....com,
linux-arm-kernel@...ts.infradead.org, iommu@...ts.linux.dev,
linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org
Subject: Re: [PATCH RFCv1 2/3] PCI: Allow ATS to be always on for non-CXL
NVIDIA GPUs
On Fri, Jan 16, 2026 at 08:56:41PM -0800, Nicolin Chen wrote:
> Some non-CXL NVIDIA GPU devices support non-PASID ATS function when their
> RIDs are IOMMU bypassed. This is slightly different than the default ATS
> policy which would only enable ATS on demand: when a non-zero PASID line
> is enabled in SVA use cases.
Not support, require non-PASID ATS.
I've been describing these devices as pre-CXL, in that they have many
CXL like properties, including what motivated the prior patch, but do
not implement the CXL config space.
> +/* Some non-CXL devices support ATS on RID when it is IOMMU-bypassed */
Require not support
This also looks OK to me
Jason
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