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Message-Id: <20260119-imx8mm_gpu_power_domain-v1-2-34d81c766916@nxp.com>
Date: Mon, 19 Jan 2026 16:53:42 +0800
From: Jacky Bai <ping.bai@....com>
To: Ulf Hansson <ulf.hansson@...aro.org>, Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-pm@...r.kernel.org, imx@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, Jacky Bai <ping.bai@....com>
Subject: [PATCH 2/2] Remove the gpumix power domain node on imx8mm
The gpumix node is not necessary for now as the gpumix is
directly handled in the gpu2d/3d power domain, so remove
this redundant node.
Signed-off-by: Jacky Bai <ping.bai@....com>
---
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts | 4 ----
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 18 +++++-------------
2 files changed, 5 insertions(+), 17 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
index 272c2b223d167d76b1b3db881644c6c3b115fa4b..393e606f242d2dba253a836c159b9db2f73634ed 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
@@ -741,10 +741,6 @@ &pgc_gpu {
status = "disabled";
};
-&pgc_gpumix {
- status = "disabled";
-};
-
&pgc_mipi {
status = "disabled";
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 9f49c0b386d31051da9638b566c5e5ee5d2c54b2..3358a751ab3b624270324a4b056b80200482326c 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -701,18 +701,6 @@ pgc_otg2: power-domain@3 {
reg = <IMX8MM_POWER_DOMAIN_OTG2>;
};
- pgc_gpumix: power-domain@4 {
- #power-domain-cells = <0>;
- reg = <IMX8MM_POWER_DOMAIN_GPUMIX>;
- clocks = <&clk IMX8MM_CLK_GPU_BUS_ROOT>,
- <&clk IMX8MM_CLK_GPU_AHB>;
- assigned-clocks = <&clk IMX8MM_CLK_GPU_AXI>,
- <&clk IMX8MM_CLK_GPU_AHB>;
- assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_800M>,
- <&clk IMX8MM_SYS_PLL1_800M>;
- assigned-clock-rates = <800000000>, <400000000>;
- };
-
pgc_gpu: power-domain@5 {
#power-domain-cells = <0>;
reg = <IMX8MM_POWER_DOMAIN_GPU>;
@@ -720,8 +708,12 @@ pgc_gpu: power-domain@5 {
<&clk IMX8MM_CLK_GPU_BUS_ROOT>,
<&clk IMX8MM_CLK_GPU2D_ROOT>,
<&clk IMX8MM_CLK_GPU3D_ROOT>;
+ assigned-clocks = <&clk IMX8MM_CLK_GPU_AXI>,
+ <&clk IMX8MM_CLK_GPU_AHB>;
+ assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_800M>,
+ <&clk IMX8MM_SYS_PLL1_800M>;
+ assigned-clock-rates = <800000000>, <400000000>;
resets = <&src IMX8MQ_RESET_GPU_RESET>;
- power-domains = <&pgc_gpumix>;
};
pgc_vpumix: power-domain@6 {
--
2.34.1
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