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Message-ID: <9f8619d4-43ac-4bc0-9598-c498d59a27b8@oss.qualcomm.com>
Date: Mon, 19 Jan 2026 11:28:07 +0100
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
Krzysztof Kozlowski <krzk@...nel.org>,
Luca Weiss
<luca.weiss@...rphone.com>,
Taniya Das <taniya.das@....qualcomm.com>
Cc: Georgi Djakov <djakov@...nel.org>, Bjorn Andersson
<andersson@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley
<conor+dt@...nel.org>,
~postmarketos/upstreaming@...ts.sr.ht, phone-devel@...r.kernel.org,
linux-pm@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH 2/5] dt-bindings: clock: qcom,milos-camcc: Document
interconnect path
On 1/19/26 11:20 AM, Konrad Dybcio wrote:
> On 1/17/26 12:46 PM, Krzysztof Kozlowski wrote:
>> On Fri, Jan 16, 2026 at 02:17:21PM +0100, Luca Weiss wrote:
>>> Document an interconnect path for camcc that's required to enable
>>> the CAMSS_TOP_GDSC power domain.
>>
>> I find it confusing. Enabling GDSC power domains is done via power
>> domains, not via interconnects. Do not represent power domains as
>> interconnects, it's something completely different.
>
> The name of the power domains is CAMSS_TOP_GDSC (seems you misread)
>
> For the power domain to successfully turn on, the MNoC needs to be
> turned on (empirical evidence). The way to do it is to request a
> nonzero vote on this interconnect path
>
> (presumably because the GDSC or its invisible providers require
> something connected over that bus to carry out their enable sequences).
>
> Taniya should be able to explain in more detail
We'd have a better chance of her responding if I didn't forget to
extend the recipient list, fixing that
Konrad
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