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Message-ID: <aW-HRvqc40ja60cF@smile.fi.intel.com>
Date: Tue, 20 Jan 2026 15:46:46 +0200
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: Raag Jadav <raag.jadav@...el.com>
Cc: mika.westerberg@...ux.intel.com, linusw@...nel.org,
linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
stable@...r.kernel.org, Guido Trentalancia <guido@...ntalancia.com>
Subject: Re: [PATCH] pinctrl: tigerlake: Add Alder Lake-P documentation
On Tue, Jan 20, 2026 at 04:30:42PM +0530, Raag Jadav wrote:
> Intel Alder Lake-P PCH reuses pinctrl IP from Tiger Lake-LP. Add user
> friendly documentation for it.
Thanks for doing this!
Side note, though: this is not the only driver suffering of the similar issue.
Can you address them all?
...
> select PINCTRL_INTEL
> help
> This pinctrl driver provides an interface that allows configuring
> - of Intel Tiger Lake PCH pins and using them as GPIOs.
> + PCH pins of the following platforms and using them as GPIOs.
> + - Tiger Lake
We also have letter suffix for the above. Does this driver covers _all_ Tiger
Lake modifications?
If so, I would do
- Tiger Lake (all modifications)
> + - Alder Lake-P
I can tweak this when applying if confirmed, otherwise we would need
a revisit v2.
--
With Best Regards,
Andy Shevchenko
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