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Message-ID: <20260120154502.1280938-11-ada@thorsis.com>
Date: Tue, 20 Jan 2026 16:44:51 +0100
From: Alexander Dahl <ada@...rsis.com>
To: Claudiu Beznea <claudiu.beznea@...on.dev>
Cc: Nicolas Ferre <nicolas.ferre@...rochip.com>,
Alexandre Belloni <alexandre.belloni@...tlin.com>,
Ryan Wanner <ryan.wanner@...rochip.com>,
linux-arm-kernel@...ts.infradead.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
linux-clk@...r.kernel.org,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Subject: [PATCH v3 17/19] ARM: dts: microchip: sam9x60: Add OTPC node
The One-Time Programmable (OTP) Memory Controller (OTPC) is the secure
interface between the system and the OTP memory. It also features the
Unique Product ID (UID) registers containing a unique serial number.
See datasheet (DS60001579G) sections "7. Memories" and "23. OTP Memory
Controller (OTPC)" for reference.
Signed-off-by: Alexander Dahl <ada@...rsis.com>
---
Notes:
v3:
- Removed needless header include
- Removed clock-names, not part of bindings anymore, and not used by driver
v2:
- squashed with patch adding the clock properties
arch/arm/boot/dts/microchip/sam9x60.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/microchip/sam9x60.dtsi b/arch/arm/boot/dts/microchip/sam9x60.dtsi
index f9e3962faca3f..098996739a62f 100644
--- a/arch/arm/boot/dts/microchip/sam9x60.dtsi
+++ b/arch/arm/boot/dts/microchip/sam9x60.dtsi
@@ -157,6 +157,14 @@ sdmmc1: sdio-host@...00000 {
status = "disabled";
};
+ otpc: efuse@...00000 {
+ compatible = "microchip,sam9x60-otpc", "syscon";
+ reg = <0xeff00000 0xec>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&pmc PMC_TYPE_CORE SAM9X60_PMC_MAIN_RC>, <&pmc PMC_TYPE_PERIPHERAL 46>;
+ };
+
apb {
compatible = "simple-bus";
#address-cells = <1>;
--
2.47.3
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