[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAMuHMdWfEHcNwPCVPXeAO3Sk8U=p0nMVUksiwmMnnkf0LYmnjg@mail.gmail.com>
Date: Tue, 20 Jan 2026 10:12:53 +0100
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Marek Vasut <marek.vasut@...lbox.org>
Cc: Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, linux-clk@...r.kernel.org,
linux-renesas-soc@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] clk: rs9: Convert to clk_hw_onecell_data and of_clk_hw_onecell_get()
Hi Marek,
On Mon, 19 Jan 2026 at 20:36, Marek Vasut <marek.vasut@...lbox.org> wrote:
> On 1/19/26 4:23 PM, Geert Uytterhoeven wrote:
> > rs9_of_clk_get() does not validate the clock index in the passed
> > DT clock specifier. If DT specifies an incorrect and out-of-range
> > index, this may access memory beyond the end of the fixed-size clk_dif[]
> > array.
> >
> > Instead of fixing this by adding a range check to rs9_of_clk_get(),
> > convert the driver to use the of_clk_hw_onecell_get() helper, which
> > already contains such a check. Embedding a clk_hw_onecell_data
> > structure in the rs9_driver_data structure has the added benefit that
> > the clock array always has the correct size, and thus can no longer
> > become out of sync when adding support for new rs9 variants.
> >
> > Fixes: 892e0ddea1aa6f70 ("clk: rs9: Add Renesas 9-series PCIe clock generator driver")
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@...der.be>
> > ---
> > While this patch applies on top of "[PATCH v2] clk: rs9: Reserve 8
> > struct clk_hw slots for for 9FGV0841", it can be applied or backported
> > without, by ignoring the change from "clk_dif[4]" to "clk_dif[8]".
>
> Since the 9FGV0841 is the biggest part in the 9FGV series, the one-liner
> fix I posted is better suited as a stable backport. This rework
> shouldn't have the Fixes tag, since it is only that, a rework.
This is not just a rework, as it also fixes a second issue.
But since you prefer simpler fixes, I have submitted a v2 that just
adds the missing range check[2]. We can revisit the conversion to
of_clk_hw_onecell_get() later, after all fixes have landed.
> With that fixed:
>
> Reviewed-by: Marek Vasut <marek.vasut+renesas@...lbox.org>
Thanks!
[2] "[PATCH] clk: rs9: Add clock index range check to rs9_of_clk_get()"
https://lore.kernel.org/all/4cb63bd8b1e49407831431fbc88b218f720a74fd.1768899891.git.geert+renesas@glider.be
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Powered by blists - more mailing lists