linux-kernel - [PATCH 5/5] KVM: x86: selftests: Fix write MSR_TSC

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Message-ID: <20260120091449.526798-6-zhiquan_li@163.com>
Date: Tue, 20 Jan 2026 17:14:48 +0800
From: Zhiquan Li <zhiquan_li@....com>
To: seanjc@...gle.com,
	pbonzini@...hat.com,
	shuah@...nel.org
Cc: kvm@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	zhiquan_li@....com
Subject: [PATCH 5/5] KVM: x86: selftests: Fix write MSR_TSC_AUX reserved bits test failure on Hygon

On Hygon processors either RDTSCP or RDPID is supported in the host,
MSR_TSC_AUX is able to be accessed.

The write reserved bits test for MSR_TSC_AUX with RDPID as "feature"
and RDTSCP as "feature2" is failed on Hygon CPUs which only support
RDTSCP but not support RDPID.  In current design, if RDPID is not
supported, vCPU0 and vCPU1 write reserved bits expects #GP, however, it
is not applicable for Hygon CPUs.  Since on Hygon architecture whether
or not RDPID is supported in the host, once RDTSCP is supported,
MSR_TSC_AUX is able to be accessed, vCPU0 and vCPU1 drop bits 63:32 and
write successfully.

Therefore, the results of write MSR_TSC_AUX reserved bits on Hygon CPUs
should be:
1) either RDTSCP or RDPID is supported case and both are supported case,
   expect success and a truncated value, not #GP.
2) neither RDTSCP nor RDPID is supported, expect #GP.

Signed-off-by: Zhiquan Li <zhiquan_li@....com>
---
 tools/testing/selftests/kvm/x86/msrs_test.c | 26 +++++++++++++++++----
 1 file changed, 21 insertions(+), 5 deletions(-)

diff --git a/tools/testing/selftests/kvm/x86/msrs_test.c b/tools/testing/selftests/kvm/x86/msrs_test.c
index 40d918aedce6..2f1e800fe691 100644
--- a/tools/testing/selftests/kvm/x86/msrs_test.c
+++ b/tools/testing/selftests/kvm/x86/msrs_test.c
@@ -77,11 +77,11 @@ static bool ignore_unsupported_msrs;
 static u64 fixup_rdmsr_val(u32 msr, u64 want)
 {
 	/*
-	 * AMD CPUs drop bits 63:32 on some MSRs that Intel CPUs support.  KVM
-	 * is supposed to emulate that behavior based on guest vendor model
+	 * AMD and Hygon CPUs drop bits 63:32 on some MSRs that Intel CPUs support.
+	 * KVM is supposed to emulate that behavior based on guest vendor model
 	 * (which is the same as the host vendor model for this test).
 	 */
-	if (!host_cpu_is_amd)
+	if (!host_cpu_is_amd && !host_cpu_is_hygon)
 		return want;
 
 	switch (msr) {
@@ -94,6 +94,17 @@ static u64 fixup_rdmsr_val(u32 msr, u64 want)
 	}
 }
 
+/*
+ * On Hygon processors either RDTSCP or RDPID is supported in the host,
+ * MSR_TSC_AUX is able to be accessed.
+ */
+static bool is_hygon_msr_tsc_aux_supported(const struct kvm_msr *msr)
+{
+	return host_cpu_is_hygon &&
+			msr->index == MSR_TSC_AUX &&
+			(this_cpu_has(msr->feature) || this_cpu_has(msr->feature2));
+}
+
 static void __rdmsr(u32 msr, u64 want)
 {
 	u64 val;
@@ -174,9 +185,14 @@ void guest_test_reserved_val(const struct kvm_msr *msr)
 	/*
 	 * If the CPU will truncate the written value (e.g. SYSENTER on AMD),
 	 * expect success and a truncated value, not #GP.
+	 *
+	 * On Hygon CPUs whether or not RDPID is supported in the host, once RDTSCP
+	 * is supported, MSR_TSC_AUX is able to be accessed.  So, for either RDTSCP
+	 * or RDPID is supported case and both are supported case, expect
+	 * success and a truncated value, not #GP.
 	 */
-	if (!this_cpu_has(msr->feature) ||
-	    msr->rsvd_val == fixup_rdmsr_val(msr->index, msr->rsvd_val)) {
+	if (!is_hygon_msr_tsc_aux_supported(msr) && (!this_cpu_has(msr->feature) ||
+	    msr->rsvd_val == fixup_rdmsr_val(msr->index, msr->rsvd_val))) {
 		u8 vec = wrmsr_safe(msr->index, msr->rsvd_val);
 
 		__GUEST_ASSERT(vec == GP_VECTOR,
-- 
2.43.0