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Message-ID: <c3878cb0-cf37-41a3-a875-cf8f2a604b0c@collabora.com>
Date: Tue, 20 Jan 2026 10:43:29 +0100
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
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Subject: Re: [PATCH v5 11/24] scsi: ufs: mediatek: Rework probe function
Il 13/01/26 08:26, Peter Wang (王信友) ha scritto:
> On Mon, 2026-01-12 at 16:02 +0100, AngeloGioacchino Del Regno wrote:
>> No, MediaTek's reset hardware implementation is not the same as Texas
>> Instruments.
>> It was *very similar* to TI in the past (years ago, around the MT6795
>> Helio
>> generation times).
>>
>> MediaTek's reset controller - by hardware - is definitely different
>> from the one
>> found in TI SoCs.
>>
>> Regards,
>> Angelo
>
> I did not notice this change.
> Will you be helping to upstream MediaTek's reset controller instead of
> TI's?
>
The main reset controllers are already integrated in clock drivers since
... well, years ago.
If there's any additional reset controller that is missing, and special to
UFS, and that's not in the UFS clock driver, yes we can upstream that.
Cheers,
Angelo
> Thanks
> Peter
>
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