linux-kernel - [PATCH] soc/tegra: Use Arm SMCCC to get chip ID, revision, and platform info

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [day] [month] [year] [list]

Message-ID: <20260120111127.83898-1-kkartik@nvidia.com>
Date: Tue, 20 Jan 2026 16:41:27 +0530
From: Kartik Rajput <kkartik@...dia.com>
To: <thierry.reding@...il.com>, <jonathanh@...dia.com>,
	<linux-tegra@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC: Kartik Rajput <kkartik@...dia.com>
Subject: [PATCH] soc/tegra: Use Arm SMCCC to get chip ID, revision, and platform info

Tegra410 and Tegra241 deprecate the HIDREV register. The recommended
method is to use Arm SMCCC to retrieve the chip ID, major and minor
revisions, and platform information.

Prefer Arm SMCCC when the platform supports it; fall back to HIDREV
otherwise. Behavior on older Tegra SoCs that do not support Arm SMCCC
remains unchanged.

Signed-off-by: Kartik Rajput <kkartik@...dia.com>
---
 drivers/soc/tegra/fuse/tegra-apbmisc.c | 31 ++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/drivers/soc/tegra/fuse/tegra-apbmisc.c b/drivers/soc/tegra/fuse/tegra-apbmisc.c
index 0ce94fdc536f..732a0a830bdf 100644
--- a/drivers/soc/tegra/fuse/tegra-apbmisc.c
+++ b/drivers/soc/tegra/fuse/tegra-apbmisc.c
@@ -4,6 +4,7 @@
  */
 
 #include <linux/acpi.h>
+#include <linux/arm-smccc.h>
 #include <linux/export.h>
 #include <linux/io.h>
 #include <linux/kernel.h>
@@ -27,6 +28,11 @@
 #define PMC_STRAPPING_OPT_A_RAM_CODE_MASK_SHORT	\
 	(0x3 << PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT)
 
+#define TEGRA_SMCCC_PLATFORM(x)		(((x) >> 8) & 0xff)
+#define TEGRA_SMCCC_CHIP_ID(x)		(((x) >> 4) & 0xff)
+#define TEGRA_SMCCC_MAJOR_REV(x)	((x) & 0xf)
+#define TEGRA_SMCCC_MINOR_REV(x)	((x) & 0xf)
+
 static void __iomem *apbmisc_base;
 static bool long_ram_code;
 static u32 strapping;
@@ -41,21 +47,46 @@ u32 tegra_read_chipid(void)
 
 u8 tegra_get_chip_id(void)
 {
+#if IS_ENABLED(CONFIG_HAVE_ARM_SMCCC_DISCOVERY)
+	s32 soc_id = arm_smccc_get_soc_id_version();
+
+	if (soc_id >= 0)
+		return TEGRA_SMCCC_CHIP_ID(soc_id);
+#endif
 	return (tegra_read_chipid() >> 8) & 0xff;
 }
 
 u8 tegra_get_major_rev(void)
 {
+#if IS_ENABLED(CONFIG_HAVE_ARM_SMCCC_DISCOVERY)
+	s32 soc_id = arm_smccc_get_soc_id_version();
+
+	if (soc_id >= 0)
+		return TEGRA_SMCCC_MAJOR_REV(soc_id);
+#endif
 	return (tegra_read_chipid() >> 4) & 0xf;
 }
 
 u8 tegra_get_minor_rev(void)
 {
+#if IS_ENABLED(CONFIG_HAVE_ARM_SMCCC_DISCOVERY)
+	s32 revision = arm_smccc_get_soc_id_revision();
+
+	if (revision >= 0)
+		return TEGRA_SMCCC_MINOR_REV(revision);
+#endif
 	return (tegra_read_chipid() >> 16) & 0xf;
+
 }
 
 u8 tegra_get_platform(void)
 {
+#if IS_ENABLED(CONFIG_HAVE_ARM_SMCCC_DISCOVERY)
+	s32 revision = arm_smccc_get_soc_id_revision();
+
+	if (revision >= 0)
+		return TEGRA_SMCCC_PLATFORM(revision);
+#endif
 	return (tegra_read_chipid() >> 20) & 0xf;
 }
 
-- 
2.43.0