linux-kernel - [PATCH v3 0/3] Add pinctrl support for AST2700 SoC

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Message-ID: <20260120-upstream_pinctrl-v3-0-868fbf8413b5@aspeedtech.com>
Date: Tue, 20 Jan 2026 19:43:04 +0800
From: Billy Tsai <billy_tsai@...eedtech.com>
To: Lee Jones <lee@...nel.org>, Rob Herring <robh@...nel.org>, "Krzysztof
 Kozlowski" <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, "Joel
 Stanley" <joel@....id.au>, Andrew Jeffery <andrew@...econstruct.com.au>,
	"Linus Walleij" <linusw@...nel.org>, Billy Tsai <billy_tsai@...eedtech.com>,
	"Bartosz Golaszewski" <brgl@...nel.org>
CC: Andrew Jeffery <andrew@...id.au>, <devicetree@...r.kernel.org>,
	<linux-arm-kernel@...ts.infradead.org>, <linux-aspeed@...ts.ozlabs.org>,
	<linux-kernel@...r.kernel.org>, <openbmc@...ts.ozlabs.org>,
	<linux-gpio@...r.kernel.org>, <bmc-sw@...eedtech.com>
Subject: [PATCH v3 0/3] Add pinctrl support for AST2700 SoC

This series adds device tree bindings and a pinctrl driver for the
ASPEED AST2700 SoC.

AST2700 is composed of two interconnected SoC instances, each providing
its own pin control hardware. This series introduces bindings describing
the AST2700 pinctrl architecture and adds pinctrl driver support for the
SoC0 instance.

The bindings document the AST2700 dual-SoC design and follow common
pinctrl conventions, while the driver implementation builds upon the
existing ASPEED pinctrl infrastructure.

---
Changes in v3:
dt-bindings: pinctrl: aspeed: AST2700 pinctrl improvements
- Improved binding descriptions for SoC0 and SoC1 to better explain the
  AST2700 dual-SoC architecture with independent pin control blocks
- Switched from additionalProperties to patternProperties using the
  '-state$' suffix to restrict child node naming
- Removed per-binding examples based on review feedback
- Added additionalProperties: false at the top level for stricter schema
  validation
- Dropped the aspeed,ast2700-soc1-pinctrl binding, as the SoC1 pinctrl
  registers follow a regular layout and can be described using an
  existing generic pinctrl binding
- Updated the function and group enum lists to match the definitions
  used by the AST2700 pinctrl driver

dt-bindings: mfd: aspeed: Add AST2700 SCU example with pinctrl
- Added a complete AST2700 SCU0 example demonstrating pinctrl integration
- Example covers both pin function/group configuration and pin
  drive-strength settings
- Updated child node naming to use the '-state' suffix, following common
  pinctrl conventions

pinctrl: aspeed: AST2700 SoC0 driver improvements
- Refactored pin and signal declarations to use common ASPEED pinmux
  macros (SIG_EXPR_LIST_DECL_SEMG, SIG_EXPR_LIST_DECL_SESG, PIN_DECL_*)
- Added SCU010 register definition for hardware strap control
- Reworked code structure to better align with existing ASPEED pinctrl
  drivers

- Link to v2: https://lore.kernel.org/r/20250904103401.88287-1-billy_tsai@aspeedtech.com

Changes in v2:
- Update pinctrl aspeed binding files.
- Update the commit message for pinctrl binding patch.
- Link to v1: https://lore.kernel.org/r/20250829073030.2749482-1-billy_tsai@aspeedtech.com

---
Billy Tsai (3):
      Add compatible strings for AST2700 pinctrl to the SCU binding.
      dt-bindings: pinctrl: aspeed: Add support for AST27xx
      pinctrl: aspeed: add G7(AST2700) SoC0 pinctrl support

 .../bindings/mfd/aspeed,ast2x00-scu.yaml           |  28 +
 .../pinctrl/aspeed,ast2700-soc0-pinctrl.yaml       | 130 ++++
 drivers/pinctrl/aspeed/Kconfig                     |   8 +
 drivers/pinctrl/aspeed/Makefile                    |   1 +
 drivers/pinctrl/aspeed/pinctrl-aspeed-g7-soc0.c    | 683 +++++++++++++++++++++
 5 files changed, 850 insertions(+)
---
base-commit: 8f0b4cce4481fb22653697cced8d0d04027cb1e8
change-id: 20251215-upstream_pinctrl-8f195df0a975

Best regards,
-- 
Billy Tsai <billy_tsai@...eedtech.com>