linux-kernel - Re: [PATCH v3 3/3] pinctrl: aspeed: add G7(AST2700) SoC0 pinctrl support

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Message-ID: <0d8ad41f-a2c4-4a4f-ac1f-68263648c4dc@kernel.org>
Date: Tue, 20 Jan 2026 13:27:09 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Billy Tsai <billy_tsai@...eedtech.com>, Lee Jones <lee@...nel.org>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Joel Stanley <joel@....id.au>,
 Andrew Jeffery <andrew@...econstruct.com.au>,
 Linus Walleij <linusw@...nel.org>, Bartosz Golaszewski <brgl@...nel.org>
Cc: Andrew Jeffery <andrew@...id.au>, devicetree@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-aspeed@...ts.ozlabs.org,
 linux-kernel@...r.kernel.org, openbmc@...ts.ozlabs.org,
 linux-gpio@...r.kernel.org, bmc-sw@...eedtech.com
Subject: Re: [PATCH v3 3/3] pinctrl: aspeed: add G7(AST2700) SoC0 pinctrl
 support

On 20/01/2026 12:43, Billy Tsai wrote:
> Add pinctrl support for the SoC0 instance of the ASPEED AST2700.
> 
> AST2700 consists of two interconnected SoC instances, each with its own
> pinctrl register block.
> 
> The SoC0 pinctrl hardware closely follows the design found in previous
> ASPEED BMC generations, allowing the driver to build upon the common
> ASPEED pinctrl infrastructure.
> 
> Signed-off-by: Billy Tsai <billy_tsai@...eedtech.com>
> ---
>  drivers/pinctrl/aspeed/Kconfig                  |   8 +
>  drivers/pinctrl/aspeed/Makefile                 |   1 +
>  drivers/pinctrl/aspeed/pinctrl-aspeed-g7-soc0.c | 683 ++++++++++++++++++++++++
>  3 files changed, 692 insertions(+)
> 
> diff --git a/drivers/pinctrl/aspeed/Kconfig b/drivers/pinctrl/aspeed/Kconfig
> index 1a4e5b9ed471..16743091a139 100644
> --- a/drivers/pinctrl/aspeed/Kconfig
> +++ b/drivers/pinctrl/aspeed/Kconfig
> @@ -31,3 +31,11 @@ config PINCTRL_ASPEED_G6
>  	help
>  	  Say Y here to enable pin controller support for Aspeed's 6th
>  	  generation SoCs. GPIO is provided by a separate GPIO driver.
> +
> +config PINCTRL_ASPEED_G7
> +	bool "Aspeed G7 SoC pin control"
> +	depends on (ARCH_ASPEED || COMPILE_TEST) && OF
> +	select PINCTRL_ASPEED
> +	help
> +	  Say Y here to enable pin controller support for Aspeed's 7th
> +	  generation SoCs. GPIO is provided by a separate GPIO driver.
> diff --git a/drivers/pinctrl/aspeed/Makefile b/drivers/pinctrl/aspeed/Makefile
> index db2a7600ae2b..cb2c81a69551 100644
> --- a/drivers/pinctrl/aspeed/Makefile
> +++ b/drivers/pinctrl/aspeed/Makefile
> @@ -6,3 +6,4 @@ obj-$(CONFIG_PINCTRL_ASPEED)	+= pinctrl-aspeed.o pinmux-aspeed.o
>  obj-$(CONFIG_PINCTRL_ASPEED_G4)	+= pinctrl-aspeed-g4.o
>  obj-$(CONFIG_PINCTRL_ASPEED_G5)	+= pinctrl-aspeed-g5.o
>  obj-$(CONFIG_PINCTRL_ASPEED_G6)	+= pinctrl-aspeed-g6.o
> +obj-$(CONFIG_PINCTRL_ASPEED_G7) += pinctrl-aspeed-g7-soc0.o
> \ No newline at end of file

Do not introduce patch warnings.

> diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g7-soc0.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g7-soc0.c
> new file mode 100644
> index 000000000000..c4e828c8839a
> --- /dev/null
> +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g7-soc0.c
> @@ -0,0 +1,683 @@
> +// SPDX-License-Identifier: GPL-2.0
> +

...

> +
> +static const struct aspeed_pinmux_ops aspeed_g7_soc0_ops = {
> +	.set = aspeed_g7_soc0_sig_expr_set,
> +};
> +
> +static struct aspeed_pinctrl_data aspeed_g7_soc0_pinctrl_data = {

Look at your existing drivers - what is missing here and in other places?

> +	.pins = aspeed_g7_soc0_pins,
> +	.npins = ARRAY_SIZE(aspeed_g7_soc0_pins),
> +	.pinmux = {
> +		.ops = &aspeed_g7_soc0_ops,
> +		.groups = aspeed_g7_soc0_groups,
> +		.ngroups = ARRAY_SIZE(aspeed_g7_soc0_groups),
> +		.functions = aspeed_g7_soc0_functions,
> +		.nfunctions = ARRAY_SIZE(aspeed_g7_soc0_functions),
> +	},
> +	.configs = aspeed_g7_soc0_configs,
> +	.nconfigs = ARRAY_SIZE(aspeed_g7_soc0_configs),
> +	.confmaps = aspeed_g7_soc0_pin_config_map,
> +	.nconfmaps = ARRAY_SIZE(aspeed_g7_soc0_pin_config_map),
> +};
> +
> +static int aspeed_g7_soc0_pinctrl_probe(struct platform_device *pdev)
> +{
> +	return aspeed_pinctrl_probe(pdev, &aspeed_g7_soc0_pinctrl_desc,
> +				    &aspeed_g7_soc0_pinctrl_data);
> +}
> +
> +static const struct of_device_id aspeed_g7_soc0_pinctrl_match[] = {
> +	{ .compatible = "aspeed,ast2700-soc0-pinctrl" },
> +	{}
> +};
> +MODULE_DEVICE_TABLE(of, aspeed_g7_soc0_pinctrl_match);
> +
> +static struct platform_driver aspeed_g7_soc0_pinctrl_driver = {
> +	.probe = aspeed_g7_soc0_pinctrl_probe,
> +	.driver = {
> +		.name = "aspeed-g7-soc0-pinctrl",
> +		.of_match_table = aspeed_g7_soc0_pinctrl_match,
> +		.suppress_bind_attrs = true,
> +	},
> +};
> +
> +static int __init aspeed_g7_soc0_pinctrl_init(void)
> +{
> +	return platform_driver_register(&aspeed_g7_soc0_pinctrl_driver);
> +}
> +arch_initcall(aspeed_g7_soc0_pinctrl_init);
> 


Best regards,
Krzysztof