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Message-ID: <aXE5lImvUBOb8hqS@lizhi-Precision-Tower-5810>
Date: Wed, 21 Jan 2026 15:39:48 -0500
From: Frank Li <Frank.li@....com>
To: Josua Mayer <josua@...id-run.com>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
Mikhail Anikin <mikhail.anikin@...id-run.com>,
Yazan Shhady <yazan.shhady@...id-run.com>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
imx@...ts.linux.dev, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v7 5/8] arm64: dts: add description for solidrun imx8mp
hummingboard-iiot
On Sun, Jan 18, 2026 at 02:51:42PM +0200, Josua Mayer wrote:
> Add description for the SolidRun i.MX8MP HummingBoard IIoT.
> The board is a new design around the i.MX8MP System on Module, not
> sharing much with previous HummingBoards.
suggested commit message
add support for SolidRun i.MX8MP HummingBoard IIoT
Introduce support for the SolidRun i.MX8MP HummingBoard IIoT platform.
This board is a new design based on the i.MX8MP System on Module and
does not share much hardware with previous HummingBoard variants.
>
> It comes with some common features:
> - 3x USB-3.0 Type A connector
> - 2x 1Gbps RJ45 Ethernet
> - USB Type-C Console Port
> - microSD connector
> - RTC with backup battery
> - RGB Status LED
> - 1x M.2 M-Key connector with PCI-E Gen. 3 x1
> - 1x M.2 B-Key connector with USB-2.0/3.0 + SIM card holder
> - 1x LVDS Display Connector
> - 1x DSI Display Connector
> - GPIO header
> - 2x RS232/RS485 ports (configurable)
> - 2x CAN
>
> In addition there is a board-to-board expansion connector to support
> custom daughter boards with access to SPI, a range of GPIOs and -
> notably - CAN and UART. Both 2x CAN and 2x UART can be muxed either
> to this b2b connector, or a termianl block connector on the base board.
>
> The routing choice for UART and CAN is expressed through gpio
> mux-controllers in DT and can be changed by applying dtb addons.
s/addons/overlay
>
> Signed-off-by: Josua Mayer <josua@...id-run.com>
> ---
> arch/arm64/boot/dts/freescale/Makefile | 2 +
> .../dts/freescale/imx8mp-hummingboard-iiot.dts | 719 +++++++++++++++++++++
> 2 files changed, 721 insertions(+)
>
...
> +
> + uart3_rs_232_485_mux: mux-controller-4 {
> + compatible = "gpio-mux";
> + #mux-control-cells = <0>;
> + /*
> + * Mux switches uart3 tx/rx between rs232 and rs485
> + * transceivers. using one GPIO: 0 = rs232; 1 = rs485.
> + */
> + mux-gpios = <&tca6416_u20 1 GPIO_ACTIVE_HIGH>;
> + /* default rs232 */
> + idle-state = <0>;
> + };
> +
> + uart4_rs_232_485_mux: mux-controller-5 {
> + compatible = "gpio-mux";
> + #mux-control-cells = <0>;
> + /*
> + * Mux switches uart4 tx/rx between rs232 and rs485
> + * transceivers. using one GPIO: 0 = rs232; 1 = rs485.
> + */
> + mux-gpios = <&tca6416_u20 2 GPIO_ACTIVE_HIGH>;
> + /* default rs232 */
> + idle-state = <0>;
> + };
> +
> + gpio-keys {
please order as node name. suggest use
https://github.com/lznuaa/dt-format
to reorder it.
> + compatible = "gpio-keys";
> +
> + wakeup-event {
> + label = "m2-m-wakeup";
> + interrupts-extended = <&tca6416_u21 11 IRQ_TYPE_EDGE_FALLING>;
> + linux,code = <KEY_WAKEUP>;
> + wakeup-source;
> + };
> + };
> +};
> +
...
> +
> +&i2c2 {
> + i2c-mux@70 {
> + compatible = "nxp,pca9546";
> + reg = <0x70>;
> + /*
> + * This reset is open drain,
> + * but reset core does not support GPIO_OPEN_DRAIN flag.
> + */
> + reset-gpios = <&tca6416_u21 2 GPIO_ACTIVE_LOW>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + /* channel 0 routed to expansion connector (J22) */
> + i2c_exp: i2c@0 {
> + reg = <0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + /* channel 1 routed to mipi-csi connector (J23) */
> + i2c_csi: i2c@1 {
> + reg = <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + /* channel 2 routed to mipi-dsi connector (J25) */
> + i2c_dsi: i2c@2 {
> + reg = <2>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + tca6408_u48: gpio@21 {
> + compatible = "ti,tca6408";
> + reg = <0x21>;
> + /*
> + * reset shared between U37 and U48, to be
> + * supported once gpio-pca953x switches to
> + * reset framework.
> + *
> + * reset-gpios = <&tca6416_u21 4 (GPIO_ACTIVE_LOW|GPIO_PULL_UP|GPIO_OPEN_DRAIN)>;
dose checkpatch report error? line width over 100
Frank
> + */
> + gpio-controller;
> + #gpio-cells = <2>;
> + gpio-line-names = "CAM_RST#", "DSI_RESET",
> + "DSI_STBYB", "DSI_PWM_BL",
> + "DSI_L/R", "DSI_U/D",
> + "DSI_CTP_/RST", "CAM_TRIG";
> + };
> + };
> +
> + /* channel 2 routed to lvds connector (J24) */
> + i2c_lvds: i2c@3 {
> + reg = <3>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + tca6408_u37: gpio@20 {
> + compatible = "ti,tca6408";
> + reg = <0x20>;
> + /*
> + * reset shared between U37 and U48, to be
> + * supported once gpio-pca953x switches to
> + * reset framework.
> + *
> + * reset-gpios = <&tca6416_u21 4 (GPIO_ACTIVE_LOW|GPIO_PULL_UP|GPIO_OPEN_DRAIN)>;
> + */
> + gpio-controller;
> + #gpio-cells = <2>;
> + gpio-line-names = "SELB", "LVDS_RESET",
> + "LVDS_STBYB", "LVDS_PWM_BL",
> + "LVDS_L/R", "LVDS_U/D",
> + "LVDS_CTP_/RST", "";
> + };
> + };
> + };
> +};
> +
> +&i2c3 {
> + /* highest i2c clock supported by all peripherals is 400kHz */
> + clock-frequency = <400000>;
> +
> + tca6416_u20: gpio@20 {
> + /*
> + * This is a TI TCAL6416 using same programming model as
> + * NXP PCAL6416, not to be confused with TI TCA6416.
> + */
> + compatible = "nxp,pcal6416";
> + reg = <0x20>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + gpio-line-names = "TCA_INT/EXT_UART", "TCA_UARTA_232/485",
> + "TCA_UARTB_232/485", "TCA_INT/EXT_CAN",
> + "TCA_NXP/REN", "TCA_M.2B_3V3_EN",
> + "TCA_M.2M_3V3_EN", "TCA_M.2M_RESET#",
> + "TCA_M.2B_RESET#", "TCA_M.2B_W_DIS#",
> + "TCA_M.2B_GPS_EN#", "TCA_USB-HUB_RST#",
> + "TCA_USB_HUB3_PWR_EN", "TCA_USB_HUB4_PWR_EN",
> + "TCA_USB1_PWR_EN", "TCA_VIDEO_PWR_EN";
> +
> + m2-b-reset-hog {
> + gpio-hog;
> + gpios = <8 GPIO_ACTIVE_LOW>;
> + output-low;
> + line-name = "m2-b-reset";
> + };
> + };
> +
> + tca6416_u21: gpio@21 {
> + /*
> + * This is a TI TCAL6416 using same programming model as
> + * NXP PCAL6416, not to be confused with TI TCA6416.
> + */
> + compatible = "nxp,pcal6416";
> + reg = <0x21>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&tca6416_u21_int_pins>;
> + interrupts-extended = <&gpio1 15 IRQ_TYPE_EDGE_FALLING>;
> + gpio-line-names = "TCA_SPI_TPM/EXT", "TCA_TPM_RST#",
> + "TCA_I2C_RST", "TCA_RS232_SHTD#",
> + "TCA_LCD_I2C_RST", "TCA_DIG_OUT1",
> + "TCA_bDIG_IN1", "TCA_SENS_INT",
> + "TCA_ALERT#", "TCA_TPM_PIRQ#",
> + "TCA_RTC_INT", "TCA_M.2M_WAKW_ON_LAN",
> + "TCA_M.2M_CLKREQ#", "TCA_LVDS_INT#",
> + "", "TCA_POE_AT";
> +
> + rs232_shutdown: rs232-shutdown-hog {
> + gpio-hog;
> + gpios = <3 GPIO_ACTIVE_LOW>;
> + output-low;
> + line-name = "rs232-shutdown";
> + };
> +
> + lcd-i2c-reset-hog {
> + /*
> + * reset shared between U37 and U48, to be
> + * supported once gpio-pca953x switches to
> + * reset framework.
> + */
> + gpio-hog;
> + gpios = <4 (GPIO_ACTIVE_LOW|GPIO_PULL_UP|GPIO_OPEN_DRAIN)>;
> + output-low;
> + line-name = "lcd-i2c-reset";
> + };
> +
> + m2-m-clkreq-hog {
> + gpio-hog;
> + gpios = <12 GPIO_ACTIVE_LOW>;
> + input;
> + line-name = "m2-m-clkreq";
> + };
> + };
> +
> + led-controller@30 {
> + compatible = "ti,lp5562";
> + reg = <0x30>;
> + /* use internal clock, could use external generated by rtc */
> + clock-mode = /bits/ 8 <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + multi-led@0 {
> + reg = <0x0>;
> + label = "D7";
> + color = <LED_COLOR_ID_RGB>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + led@0 {
> + reg = <0x0>;
> + color = <LED_COLOR_ID_RED>;
> + led-cur = /bits/ 8 <0x32>;
> + max-cur = /bits/ 8 <0x64>;
> + };
> +
> + led@1 {
> + reg = <0x1>;
> + color = <LED_COLOR_ID_GREEN>;
> + led-cur = /bits/ 8 <0x19>;
> + max-cur = /bits/ 8 <0x32>;
> + };
> +
> + led@2 {
> + reg = <0x2>;
> + color = <LED_COLOR_ID_BLUE>;
> + led-cur = /bits/ 8 <0x19>;
> + max-cur = /bits/ 8 <0x32>;
> + };
> + };
> +
> + led@3 {
> + reg = <0x3>;
> + chan-name = "D8";
> + label = "D8";
> + color = <LED_COLOR_ID_GREEN>;
> + led-cur = /bits/ 8 <0x19>;
> + max-cur = /bits/ 8 <0x64>;
> + };
> + };
> +
> + light-sensor@44 {
> + compatible = "isil,isl29023";
> + reg = <0x44>;
> + /* IRQ shared between accelerometer, light-sensor and Tamper input (J5007) */
> + interrupts-extended = <&tca6416_u21 7 IRQ_TYPE_EDGE_FALLING>;
> + };
> +
> + accelerometer@53 {
> + compatible = "adi,adxl345";
> + reg = <0x53>;
> + /* IRQ shared between accelerometer, light-sensor and Tamper input (J5007) */
> + interrupt-names = "INT1";
> + interrupts-extended = <&tca6416_u21 7 IRQ_TYPE_EDGE_FALLING>;
> + };
> +
> + carrier_eeprom: eeprom@57{
> + compatible = "atmel,24c02";
> + reg = <0x57>;
> + pagesize = <8>;
> + };
> +
> + carrier_rtc: rtc@69 {
> + compatible = "abracon,ab1805";
> + reg = <0x69>;
> + abracon,tc-diode = "schottky";
> + abracon,tc-resistor = <3>;
> + /*
> + * AM1805 RTC used on this board has only nTIRQ pins wired,
> + * which is for countdown timer irqs only.
> + * Driver does not support this, disable for now.
> + *
> + * interrupts-extended = <&tca6416_u21 10 IRQ_TYPE_EDGE_FALLING>;
> + */
> + };
> +};
> +
> +&iomuxc {
> + can1_pins: pinctrl-can1-grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_SPDIF_RX__CAN1_RX 0x154
> + MX8MP_IOMUXC_SPDIF_TX__CAN1_TX 0x154
> + >;
> + };
> +
> + can2_pins: pinctrl-can2-grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_SAI5_MCLK__CAN2_RX 0x154
> + MX8MP_IOMUXC_SAI5_RXD3__CAN2_TX 0x154
> + >;
> + };
> +
> + ecspi2_pins: pinctrl-ecspi2-grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x140
> + MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x140
> + MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x140
> + MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140
> + >;
> + };
> +
> + tca6416_u21_int_pins: pinctrl-tca6416-u21-int-grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15 0x0
> + >;
> + };
> +
> + /* UARTA */
> + uart3_pins: pinctrl-uart3-grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX 0x140
> + MX8MP_IOMUXC_ECSPI1_MOSI__UART3_DCE_TX 0x140
> + MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09 0x140
> + >;
> + };
> +
> + /* UARTB */
> + uart4_pins: pinctrl-uart4-grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX 0x140
> + MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX 0x140
> + MX8MP_IOMUXC_ECSPI1_MISO__GPIO5_IO08 0x140
> + >;
> + };
> +
> + usdhc2_pins: pinctrl-usdhc2-grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
> + MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0
> + MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0
> + MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0
> + MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0
> + MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0
> + MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0x140
> + MX8MP_IOMUXC_SD2_CD_B__USDHC2_CD_B 0x140
> + >;
> + };
> +
> + usdhc2_100mhz_pins: pinctrl-usdhc2-100mhz-grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
> + MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
> + MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
> + MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
> + MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
> + MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
> + MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0x140
> + MX8MP_IOMUXC_SD2_CD_B__USDHC2_CD_B 0x140
> + >;
> + };
> +
> + usdhc2_200mhz_pins: pinctrl-usdhc2-200mhz-grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
> + MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
> + MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
> + MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
> + MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
> + MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
> + MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0x140
> + MX8MP_IOMUXC_SD2_CD_B__USDHC2_CD_B 0x140
> + >;
> + };
> +
> + vmmc_pins: pinctrl-vmmc-grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x0
> + >;
> + };
> +};
> +
> +&pcie {
> + reset-gpio = <&tca6416_u20 7 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +};
> +
> +/* M.2 M-Key (J4) */
> +&pcie_phy {
> + clocks = <&hsio_blk_ctrl>;
> + clock-names = "ref";
> + fsl,clkreq-unsupported;
> + fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_OUTPUT>;
> + status = "okay";
> +};
> +
> +&phy0 {
> + leds {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + /* ADIN1300 LED_0 pin */
> + led@0 {
> + reg = <0>;
> + color = <LED_COLOR_ID_GREEN>;
> + function = LED_FUNCTION_LAN;
> + default-state = "keep";
> + };
> + };
> +};
> +
> +&phy1 {
> + leds {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + /* ADIN1300 LED_0 pin */
> + led@0 {
> + reg = <0>;
> + color = <LED_COLOR_ID_GREEN>;
> + function = LED_FUNCTION_LAN;
> + default-state = "keep";
> + };
> + };
> +};
> +
> +&uart3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart3_pins>;
> + rts-gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>;
> + /* select 80MHz parent clock to support maximum baudrate 4Mbps */
> + assigned-clocks = <&clk IMX8MP_CLK_UART3>;
> + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
> + status = "okay";
> +};
> +
> +&uart4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart4_pins>;
> + rts-gpios = <&gpio5 8 GPIO_ACTIVE_HIGH>;
> + /* select 80MHz parent clock to support maximum baudrate 4Mbps */
> + assigned-clocks = <&clk IMX8MP_CLK_UART4>;
> + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
> + status = "okay";
> +};
> +
> +&usb3_phy0 {
> + fsl,phy-tx-preemp-amp-tune-microamp = <1200>;
> + vbus-supply = <&vbus1>;
> + status = "okay";
> +};
> +
> +&usb3_0 {
> + status = "okay";
> +};
> +
> +&usb3_phy1 {
> + status = "okay";
> +};
> +
> +&usb3_1 {
> + status = "okay";
> +};
> +
> +&usb_dwc3_0 {
> + dr_mode = "host";
> +};
> +
> +&usb_dwc3_1 {
> + dr_mode = "host";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + hub_2_0: hub@1 {
> + compatible = "usb4b4,6502", "usb4b4,6506";
> + reg = <1>;
> + peer-hub = <&hub_3_0>;
> + reset-gpios = <&tca6416_u20 11 GPIO_ACTIVE_LOW>;
> + vdd-supply = <&v_1_2>;
> + vdd2-supply = <&v_3_3>;
> + };
> +
> + hub_3_0: hub@2 {
> + compatible = "usb4b4,6500", "usb4b4,6504";
> + reg = <2>;
> + peer-hub = <&hub_2_0>;
> + reset-gpios = <&tca6416_u20 11 GPIO_ACTIVE_LOW>;
> + vdd-supply = <&v_1_2>;
> + vdd2-supply = <&v_3_3>;
> + };
> +};
> +
> +&usdhc2 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&usdhc2_pins>;
> + pinctrl-1 = <&usdhc2_100mhz_pins>;
> + pinctrl-2 = <&usdhc2_200mhz_pins>;
> + vmmc-supply = <&vmmc>;
> + bus-width = <4>;
> + cap-power-off-card;
> + full-pwr-cycle;
> + status = "okay";
> +};
>
> --
> 2.43.0
>
>
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