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Message-ID: <c0a83ab3-c9b7-48d9-9eb7-916e97c92ed5@mailbox.org>
Date: Wed, 21 Jan 2026 11:06:38 +0100
From: Marek Vasut <marek.vasut@...lbox.org>
To: Geert Uytterhoeven <geert@...ux-m68k.org>
Cc: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, linux-clk@...r.kernel.org,
linux-renesas-soc@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] clk: rs9: Add clock index range check to
rs9_of_clk_get()
On 1/21/26 10:34 AM, Geert Uytterhoeven wrote:
Hello Geert,
>>> diff --git a/drivers/clk/clk-renesas-pcie.c b/drivers/clk/clk-renesas-pcie.c
>>> index aa108df12e44fb9f..1adc5365ba1a3d59 100644
>>> --- a/drivers/clk/clk-renesas-pcie.c
>>> +++ b/drivers/clk/clk-renesas-pcie.c
>>> @@ -277,6 +277,9 @@ rs9_of_clk_get(struct of_phandle_args *clkspec, void *data)
>>> struct rs9_driver_data *rs9 = data;
>>> unsigned int idx = clkspec->args[0];
>>>
>>> + if (idx >= rs9->chip_info->num_clks)
>>
>> of_clk_src_onecell_get() does a pr_err("%s: invalid clock index %u\n",
>> __func__, idx); on error, should this function do the same ?
>
> I can add it if you want. But this function will (hopefully) be
> short-lived anyway.
This will be backported to stable, the rewrite to onecell won't, so this
will be long lived in stable backports. Please add it. Thank you !
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