linux-kernel - Re: [PATCH v6 4/5] mmc: sdhci-msm: Add Device tree parsing logic for DLL settings

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <1f32c439-77e0-42e3-aa7d-e482daa4707d@quicinc.com>
Date: Thu, 22 Jan 2026 19:07:09 +0530
From: Ram Prakash Gupta <quic_rampraka@...cinc.com>
To: Bjorn Andersson <andersson@...nel.org>
CC: Ulf Hansson <ulf.hansson@...aro.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>,
        Adrian Hunter
	<adrian.hunter@...el.com>, <linux-mmc@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-arm-msm@...r.kernel.org>, <dmitry.baryshkov@....qualcomm.com>
Subject: Re: [PATCH v6 4/5] mmc: sdhci-msm: Add Device tree parsing logic for
 DLL settings


On 12/18/2025 7:02 PM, Bjorn Andersson wrote:
> On Mon, Dec 15, 2025 at 05:30:08PM +0530, Ram Prakash Gupta wrote:
>> From: Sachin Gupta <quic_sachgupt@...cinc.com>
>>
>> This update introduces the capability to configure HS200
>> and HS400 DLL settings via the device tree and parsing it.
> No it doesn't, it merely reads a bunch of integers from DeviceTree and
> does nothing with them.
>
> Please write your commit message in imperative mood (avoid "This
> update") and please include a reasoning for why this commit exists, or
> as
> https://docs.kernel.org/process/submitting-patches.html#describe-your-changes
> says "Describe your problem.".

Will update this commit with only parsing explanation. and would remove "This update"

>> Signed-off-by: Sachin Gupta <quic_sachgupt@...cinc.com>
>> Signed-off-by: Ram Prakash Gupta <quic_rampraka@...cinc.com>
>> ---
>>  drivers/mmc/host/sdhci-msm.c | 41 ++++++++++++++++++++++++++++++++++++
>>  1 file changed, 41 insertions(+)
>>
>> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
>> index dc79f828522b..1fcd92158bee 100644
>> --- a/drivers/mmc/host/sdhci-msm.c
>> +++ b/drivers/mmc/host/sdhci-msm.c
>> @@ -266,6 +266,19 @@ struct sdhci_msm_variant_info {
>>  	const struct sdhci_msm_offset *offset;
>>  };
>>  
>> +/*
>> + * DLL registers which needs be programmed with HSR settings.
>> + * Add any new register only at the end and don't change the
>> + * sequence.
> /* You have to only add entries at the end, but I'm not going to tell you why... */

Its for future proofing for any new register addition so that it does not break
existing targets. I ll update this comment.

>
>> + */
>> +struct sdhci_msm_dll {
>> +	u32 dll_config;
>> +	u32 dll_config_2;
>> +	u32 dll_config_3;
>> +	u32 dll_usr_ctl;
>> +	u32 ddr_config;
>> +};
>> +
>>  struct sdhci_msm_host {
>>  	struct platform_device *pdev;
>>  	void __iomem *core_mem;	/* MSM SDCC mapped address */
>> @@ -274,6 +287,7 @@ struct sdhci_msm_host {
>>  	struct clk *xo_clk;	/* TCXO clk needed for FLL feature of cm_dll*/
>>  	/* core, iface, cal and sleep clocks */
>>  	struct clk_bulk_data bulk_clks[4];
>> +	struct sdhci_msm_dll dll[2];
>>  #ifdef CONFIG_MMC_CRYPTO
>>  	struct qcom_ice *ice;
>>  #endif
>> @@ -302,6 +316,7 @@ struct sdhci_msm_host {
>>  	u32 dll_config;
>>  	u32 ddr_config;
> So this dll_config/ddr_config pair is no longer supposed to be used? Or
> are there now two sets of dll and ddr configurations to be provided?
>
> Regards,
> Bjorn

These are kept to continue support for the older targets, with newer targets
which are all with artanis dll, these wont be used.

Thanks,
Ram

>
>>  	bool vqmmc_enabled;
>> +	bool artanis_dll;
>>  };
>>  
>>  static const struct sdhci_msm_offset *sdhci_priv_msm_offset(struct sdhci_host *host)
>> @@ -2534,6 +2549,23 @@ static int sdhci_msm_gcc_reset(struct device *dev, struct sdhci_host *host)
>>  	return ret;
>>  }
>>  
>> +#define DLL_SIZE 10
>> +static int sdhci_msm_dt_parse_dll_info(struct device *dev, struct sdhci_msm_host *msm_host)
>> +{
>> +	u32 *dll_table = &msm_host->dll[0].dll_config;
>> +	int ret;
>> +
>> +	msm_host->artanis_dll = false;
>> +
>> +	ret = of_property_read_variable_u32_array(dev->of_node,
>> +						  "qcom,dll-presets",
>> +						  dll_table, DLL_SIZE, DLL_SIZE);
>> +	if (ret == DLL_SIZE)
>> +		msm_host->artanis_dll = true;
>> +
>> +	return ret;
>> +}
>> +
>>  static int sdhci_msm_probe(struct platform_device *pdev)
>>  {
>>  	struct sdhci_host *host;
>> @@ -2580,6 +2612,15 @@ static int sdhci_msm_probe(struct platform_device *pdev)
>>  
>>  	msm_host->saved_tuning_phase = INVALID_TUNING_PHASE;
>>  
>> +	/*
>> +	 * Parse HSR dll only when property is present in DT.
>> +	 */
>> +	ret = sdhci_msm_dt_parse_dll_info(&pdev->dev, msm_host);
>> +	if (ret == -ENODATA || ret == -EOVERFLOW) {
>> +		dev_err(&pdev->dev, "Bad DLL in dt (%d)\n", ret);
>> +		return ret;
>> +	}
>> +
>>  	ret = sdhci_msm_gcc_reset(&pdev->dev, host);
>>  	if (ret)
>>  		return ret;
>> -- 
>> 2.34.1
>>